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ZLP32300 Datasheet(PDF) 27 Page - Zilog, Inc. |
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ZLP32300 Datasheet(HTML) 27 Page - Zilog, Inc. |
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27 / 99 page ![]() Crimzon® ZLP32300 Product Specification PS020823-0208 Functional Description 23 The upper nibble of the register pointer (see Figure 14) selects which working register group, of 16 bytes in the register file, is accessed out of the possible 256. The lower nibble selects the expanded register file bank and, in the case of the Crimzon ZLP32300 family, banks 0, F, and D are implemented. A 0h in the lower nibble allows the normal register file (bank 0) to be addressed. Any other value from 1h to Fh exchanges the lower 16 registers to an expanded register bank. Figure 14. Register Pointer Example: Crimzon ZLP32300 (see Figure 13 on page 22) R253 RP = 00h R0 = Port 0 R1 = Port 1 R2 = Port 2 R3 = Port 3 But if: R253 RP = 0Dh R0 = CTR0 R1 = CTR1 R2 = CTR2 R3 = CTR3 The counter/timers are mapped into ERF group D. Access is easily performed using the following: LD RP, #0Dh ; Select ERF D for access to bank D ; (working register group 0) LD R0,#xx ; load CTR0 LD 1, #xx ; load CTR1 R253 RP D7 D6 D5 D4 D3 D2 D1 D0 Expanded Register File Pointer Working Register Pointer Default Setting After Reset = 0000 0000 |
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