AD9891 datasheet(17/58 Pages) AD

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REV. A

AD9891/AD9895

–17–

VERTICAL TIMING GENERATION

The AD9891/AD9895 provide a very flexible solution for gener-

ating vertical CCD timing and can support multiple CCDs and

different system architectures. The 4-phase vertical transfer

clocks V1–V4 are used to shift each line of pixels into the hori-

zontal output register of the CCD. The AD9891/AD9895 allow

these outputs to be individually programmed into different pulse

patterns. Vertical sequence control registers then organize the

individual vertical pulses into the desired CCD vertical timing

arrangement.

Figure 17 shows an overview of how the vertical timing is gener-

ated in three basic steps. First, the individual pulse patterns or

sequences are created by using the Vertical Transfer Pulse (VTP)

Registers. These sequences are a essentially a “pool” of pulse

patterns that may be assigned to any of the V1-V4 outputs. Sec-

ond, individual regions are built by assigning a sequence to each

of the V1–V4 outputs. Up to five unique regions may be speci-

fied. Finally, the readout of the entire field is constructed by

combining one or more of the individual regions sequentially.

With up to eight region areas available, different steps of the

readout such as high speed line shifts and vertical image transfer

can be supported.

USE REGION 2 FOR LINES 1 TO 20

USE REGION 1 FOR LINE 21

USE REGION 0 FOR LINES 22 TO 2000

USE REGION 2 FOR LINES 2001 TO 2020

*SEQUENCES MAY BE SHIFTED AND/OR INVERTED

SEQUENCE 2

SEQUENCE 3

SEQUENCE 0

SEQUENCE 1

SEQUENCE 9

SEQUENCE 10

SEQUENCE 5

SEQUENCE 7

SEQUENCE 6

SEQUENCE 8

SEQUENCE 4

SEQUENCE 11

CREATE THE INDIVIDUAL VERTICAL

SEQUENCES (MAXIMUM OF 12 SEQUENCES).

BUILD THE INDIVIDUAL VERTICAL REGIONS BY ASSIGNING

EACH SEQUENCE TO V1–V4 OUTPUTS (MAXIMUM OF 5 REGIONS).

REGION 0

V1 (SEQ 0)

V2 (SEQ 0*)

V3 (SEQ 1)

V4 (SEQ 1*)

REGION 1

V1 (SEQ 2)

V2 (SEQ 3)

V3 (SEQ 4)

V4 (SEQ 5)

REGION 4

V1 (SEQ 6)

V2 (SEQ 6*)

V3 (SEQ 7)

V4 (SEQ 7*)

BUILD THE ENTIRE FIELD READOUT BY COMBINING

MULTIPLE REGIONS (MAXIMUM OF 8 COMBINATIONS).

Figure 17. Summary of Vertical Timing Generation

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