AD9891 datasheet(19/58 Pages) AD

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REV. A

AD9891/AD9895

–19–

Individual Vertical Regions

The AD9891/AD9895 arranges the individual sequences into re-

gions through the use of Sequence Pointers (SPTR). Within each

region, different sequences may be assigned to each V-clock

output. Figure 21 shows the programmability of each region

and Table VIII summarizes the registers needed for generating

each region.

For each individual region, the line length (in pixels) is programmable

using the HDLEN Registers. Each region can have a different

line length to accommodate various image readout techniques.

The maximum number of pixels per line is 4096. Also unique to

each region are the sequence start positions for each V-output,

which are programmed using the VSTART Registers. Each

VSTART is a 12-bit value, allowing the start position to be

placed anywhere in the line. There are five HDLEN Registers,

one for each region. There is a total of 20 VSTART Registers:

one for each V1–V4 output, for five different regions.

Note that the last line of the field is separately programmable

using the HDLASTLEN Register.

The Sequence Pointer registers VxSPTRFIRST and

VxSPTRSECOND assign the individual vertical sequences to

each of the V-clock outputs (V1–V4) within a given region.

Typically, only the SPTRFIRST Registers are used, with the

SPTRSECOND Registers reserved for generating line-by-line

alternation (see Vertical Sequence Alternation). Any of the 12

individual sequences may also be inverted using the

VxINVFIRST and VxINVSECOND Registers, effectively dou-

bling the number of sequences available. There is one

SPTRFIRST Register for each V-output, for a total of four regis-

ters per region. If all five regions are used, there is a total of 20

SPTRFIRST Registers. There is also the same number of

SPTRSECOND Registers, if alternation is required. Note that the

SPTR Registers are four bits wide; if a value greater than 11 is

programmed, the Vx output will be dc at the level of the

VxINV Register.

V1 USES SEQUENCE 2

V2 USES SEQUENCE 2,

WITH DIFFERENT START POSITION

V3 USES SEQUENCE 2, INVERTED

V4 USES SEQUENCE 2, INVERTED,

WITH DIFFERENT START POSITION

Figure 20. Example of Inverted V1–V4 Signals Using One Individual Sequence with Inversion

V1–V4

PROGRAMMABLE SETTINGS FOR EACH REGION:

1: START POSITION OF SELECTED SEQUENCE IS SEPARATELY PROGRAMMABLE FOR EACH OUTPUT

2: HD LINE LENGTH

3: SEQUENCE POINTERS (SPTR) TO SELECT AN INDIVIDUAL SEQUENCE FOR EACH OUTPUT

4: ANY SEQUENCES MAY ALSO BE ALTERNATED FOR ADDITIONAL FLEXIBILITY

SEQUENCES A, B, C, D

Figure 21. Individual Vertical Region Programmability

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