PCI7510 datasheet(36/234 Pages) TI

36 / 234 page

2–17

Table 2–12. 16-Bit PC Card Interface Control Terminals (Continued)

TERMINAL

NAME

NUMBER

I/O

DESCRIPTION

NAME

PDV

GHK

I/O

DESCRIPTION

VS1

VS2

181

167

B10

F12

I/O

Voltage sense 1 and voltage sense 2. VS1 and VS2, when used in conjunction with each other, determine

the operating voltage of the PC Card.

WAIT

183

E10

Bus cycle wait. WAIT is driven by a 16-bit PC Card to extend the completion of the memory or I/O cycle in

progress.

156

D19

Write enable. WE is used to strobe memory write data into 16-bit memory PC Cards. WE is also used for

memory PC Cards that employ programmable memory technologies.

(IOIS16)

186

B09

Write protect. WP applies to 16-bit memory PC Cards. WP reflects the status of the write-protect switch on

16-bit memory PC Cards. For 16-bit I/O cards, WP is used for the 16-bit port (IOIS16) function.

I/O is 16 bits. IOIS16 applies to 16-bit I/O PC Cards. IOIS16 is asserted by the 16-bit PC Card when the

address on the bus corresponds to an address to which the 16-bit PC Card responds, and the I/O port that

is addressed is capable of 16-bit accesses.

Table 2–13. CardBus PC Card Interface System Terminals

TERMINAL

NAME

NUMBER

I/O

DESCRIPTION

NAME

PDV

GHK

I/O

DESCRIPTION

CCLK

158

C15

CardBus clock. CCLK provides synchronous timing for all transactions on the CardBus interface. All

signals except CRST, CCLKRUN, CINT, CSTSCHG, CAUDIO, CCD2, CCD1, CVS2, and CVS1 are

sampled on the rising edge of CCLK, and all timing parameters are defined with the rising edge of this

signal. CCLK operates at the PCI bus clock frequency, but it can be stopped in the low state or slowed

down for power savings.

CCLKRUN

186

B09

I/O

CardBus clock run. CCLKRUN is used by a CardBus PC Card to request an increase in the CCLK

frequency, and by the PCI7510 device to indicate that the CCLK frequency is going to be decreased.

CRST

169

B13

CardBus reset. CRST brings CardBus PC Card-specific registers, sequencers, and signals to a known

state. When CRST is asserted, all CardBus PC Card signals are placed in a high-impedance state, and

the PCI7510 device drives these signals to a valid logic level. Assertion can be asynchronous to CCLK,

but deassertion must be synchronous to CCLK.

PCI7510 Datasheet(PDF) 36 Page - Texas Instruments

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