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CS5530A Datasheet(PDF) 160 Page - Advanced Micro Devices

Part # CS5530A
Description  AMD Geode CS5530A Companion Device
PDF  259 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

CS5530A Datasheet(HTML) 160 Page - Advanced Micro Devices

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AMD Geode™ CS5530A Companion Device Data Book
Register Descriptions
Revision 1.1
0
Generate SMI on A20M# toggle: 0 = Disable; 1 = Enable. This bit must be set to 1.
SMI status is reported in F1BAR+Memory Offset 00h/02h[7] (only).
Index 54h-59h
Reserved
Reset Value = xxh
Index 5Ah
Decode Control Register 1 (R/W)
Reset Value = 03h
7
Secondary Floppy Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port
372h, 373h, 375h, and 377h. 0 = Subtractive; 1 = Positive.
6
Primary Floppy Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port
3F2h, 3F4h, 3F5h, and 3F7h. 0 = Subtractive; 1 = Positive.
5
COM4 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 2E8h-2EFh.
0 = Subtractive; 1 = Positive.
4
COM3 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 3E8h-3EFh.
0 = Subtractive; 1 = Positive.
3
COM2 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 2F8h-2FFh.
0 = Subtractive; 1 = Positive.
2
COM1 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 3F8h-3FFh.
0 = Subtractive; 1 = Positive.
1
Keyboard Controller Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port
060h and 064h (and 062h/066h if enabled). 0 = Subtractive; 1 = Positive.
0
Real Time Clock Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port
070h-7Fh. 0 = Subtractive; 1 = Positive.
Note: Positive decoding by the CS5530A speeds up the I/O cycle time. These I/O Ports do not exist in the CS5530A. It is assumed that
if positive decode is enabled, the port exists on the ISA bus.
Index 5Bh
Decode Control Register 2 (R/W)
Reset Value = 20h
7
Keyboard I/O Port 062h/066h Decode: This alternate port to the keyboard controller is provided in support of the 8051SL
notebook keyboard controller mailbox. 0 = Disable; 1 = Enable.
6
Reserved: Set to 0.
5
BIOS ROM Positive Decode: Selects PCI positive or subtractive decoding for accesses to the configured ROM space.
0 = Subtractive; 1 = Positive.
ROM configuration is at F0 Index 52h[2:0].
4
Secondary IDE Controller Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 170h-
177h and 376h. 0 = Subtractive; 1 = Positive.
Note: Subtractive Decode mode disables this IDE controller entirely and routes any register references to the ISA bus.
3
Primary IDE Controller Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 1F0h-1F7h
and 3F6h. 0 = Subtractive; 1 = Positive.
Note: Subtractive Decode mode disables this IDE controller entirely and routes any register references to the ISA bus.
2
LPT3 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 278h-27Fh.
0 = Subtractive; 1 = Positive.
This bit does not affect 7BCh-7BEh, which is always decoded subtractively.
1
LPT2 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 378h-37Fh.
0 = Subtractive; 1 = Positive.
This bit does not affect 678h-67Ah, which is always decoded subtractively.
0
LPT1 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 3BCh-3BFh.
0 = Subtractive; 1 = Positive.
This bit does not affect 778h-77Ah, which is always decoded subtractively.
Note: Positive decoding by the CS5530A speeds up the I/O cycle time. The keyboard, LPT3, LPT2, and LPT1 I/O Ports do not exist in
the CS5530A. It is assumed that if positive decode is enabled, the port exists on the ISA bus.
Index 5Ch
PCI Interrupt Steering Register 1 (R/W)
Reset Value = 00h
7:4
INTB# Target Interrupt: Selects target interrupt for INTB#.
0000 = Disable
0100 = IRQ4
1000 = RSVD
1100 = IRQ12
0001 = IRQ1
0101 = IRQ5
1001 = IRQ9
1101 = RSVD
0010 = RSVD
0110 = IRQ6
1010 = IRQ10
1110 = IRQ14
0011 = IRQ3
0111 = IRQ7
1011 = IRQ11
1111 = IRQ15
Table 5-15. F0 Index xxh: PCI Header and Bridge Configuration Registers (Continued)
Bit
Description



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