Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

CS5530A Datasheet(PDF) 163 Page - Advanced Micro Devices

Part # CS5530A
Description  AMD Geode CS5530A Companion Device
PDF  259 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

CS5530A Datasheet(HTML) 163 Page - Advanced Micro Devices

Back Button CS5530A Datasheet HTML 159Page - Advanced Micro Devices CS5530A Datasheet HTML 160Page - Advanced Micro Devices CS5530A Datasheet HTML 161Page - Advanced Micro Devices CS5530A Datasheet HTML 162Page - Advanced Micro Devices CS5530A Datasheet HTML 163Page - Advanced Micro Devices CS5530A Datasheet HTML 164Page - Advanced Micro Devices CS5530A Datasheet HTML 165Page - Advanced Micro Devices CS5530A Datasheet HTML 166Page - Advanced Micro Devices CS5530A Datasheet HTML 167Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 163 / 259 page
background image
AMD Geode™ CS5530A Companion Device Data Book
163
Register Descriptions
Revision 1.1
2
Parallel/Serial Idle Timer Enable: Load timer from Parallel/Serial Port Idle Timer Count Register (F0 Index 9Ch) and gen-
erate an SMI when the timer expires. 0 = Disable; 1 = Enable.
If an access occurs in the address ranges (listed below) the timer is reloaded with the programmed count.
LPT1: I/O Port 378h-37Fh, 778h-77Ah
LPT2: I/O Port 278h-27Fh, 678h-67Ah
COM1: I/O Port 3F8h-3FFh (if F0 Index 93h[1:0] = 10 this range is excluded)
COM2: I/O Port 2F8h-2FFh (if F0 Index 93h[1:0] = 11 this range is excluded)
COM3: I/O Port 3E8h-3EFh
COM4: I/O Port 2E8h-2EFh
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].
Second level SMI status is reported at F0 Index 85h/F5h[2].
1
Floppy Disk Idle Timer Enable: Load timer from Floppy Disk Idle Timer Count Register (F0 Index 9Ah) and generate an
SMI when the timer expires. 0 = Disable; 1 = Enable.
If an access occurs in the address ranges (listed below) the timer is reloaded with the programmed count.
Primary floppy disk: I/O Port 3F2h, 3F4h, 3F5h, and 3F7
Secondary floppy disk: I/O Port 372h, 373h, 375h, and 377h
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].
Second level SMI status is reported at F0 Index 85h/F5h[1].
0
Primary Hard Disk Idle Timer Enable: Load timer from Primary Hard Disk Idle Timer Count Register (F0 Index 98h) and
generate an SMI when the timer expires. 0 = Disable; 1 = Enable.
If an access occurs in the address ranges selected in F0 Index 93h[5], the timer is reloaded with the programmed count.
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].
Second level SMI status is reported at F0 Index 85h/F5h[0].
Index 82h
Power Management Enable Register 3 (R/W)
Reset Value = 00h
7
Video Access Trap: 0 = Disable; 1 = Enable.
If this bit is enabled and an access occurs in the video address range (sets bit 0 of the GX1 processor’s PSERIAL
register) an SMI is generated.
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].
Second level SMI status is reported at F0 Index 86h/F6h[7].
6
User Defined Device 3 (UDEF3) Trap: 0 = Disable; 1 = Enable.
If this bit is enabled and an access occurs in the programmed address range an SMI is generated. UDEF3 address
programming is at F0 Index C8h (base address register) and CEh (control register).
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[9].
Second level SMI status is reported at F1BAR+Memory Offset 04h/06h[4].
5
User Defined Device 2 (UDEF2) Trap: 0 = Disable; 1 = Enable.
If this bit is enabled and an access occurs in the programmed address range an SMI is generated. UDEF2 address
programming is at F0 Index C4h (base address register) and CDh (control register).
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[9].
Second level SMI status is reported at F1BAR+Memory Offset 04h/06h[3].
4
User Defined Device 1 (UDEF1) Trap: 0 = Disable; 1 = Enable.
If this bit is enabled and an access occurs in the programmed address range an SMI is generated. UDEF1 address
programming is at F0 Index C0h (base address register), and CCh (control register).
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[9].
Second level SMI status is reported at F1BAR+Memory Offset 04h/06h[2].
3
Keyboard/Mouse Trap: 0 = Disable; 1 = Enable.
If this bit is enabled and an access occurs in the address ranges (listed below) an SMI is generated.
Keyboard Controller: I/O Ports 060h/064h
COM1: I/O Port 3F8h-3FFh (if F0 Index 93h[1:0] = 10 this range is included)
COM2: I/O Port 2F8h-2FFh (if F0 Index 93h[1:0] = 11 this range is included)
Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].
Second level SMI status is reported at F0 Index 86h/F6h[3].
Table 5-15. F0 Index xxh: PCI Header and Bridge Configuration Registers (Continued)
Bit
Description



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com