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AD9154 Datasheet(PDF) 110 Page - Analog Devices |
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AD9154 Datasheet(HTML) 110 Page - Analog Devices |
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110 / 124 page ![]() AD9154 Data Sheet Rev. C | Page 110 of 124 Addr. Name Bits Bit Name Settings Description Reset Access 0x29A VCO_CAL 7 SPI_VCO_CAL_EN 0x1 R/W [6:4] SPI_VCO_CAL_ ALC_WAIT 0x7 R/W [3:2] SPI_VCO_CAL_ COUNT 0x3 R/W [1:0] SPI_FB_CLOCK_ ADV 0x2 R/W 0x29C CP_LEVEL_ DETECT 7 RESERVED Reserved. 0x0 R 6 SPI_CP_LEVEL_ DET_PD 0x0 R/W [5:3] SPI_CP_LEVEL_ THRESHOLD_LOW 0x2 R/W [2:0] SPI_CP_LEVEL_ THRESHOLD_ HIGH 0x7 R/W 0x29F VCO_ VARACTOR_ CONTROL_0 7 RESERVED 0x0 R [6:4] SPI_VCO_VARAC- TOR_REF_TCF 0x3 R/W [3:0] SPI_VCO_VARAC- TOR_OFFSET 0x3 R/W 0x2A0 VCO_ VARACTOR_ CONTROL_1 [7:4] RESERVED 0x0 R [3:0] SPI_VCO_ VARACTOR_REF 0x8 R/W 0x2A7 TERM_BLK1_ CTRLREG0 [7:1] RESERVED Reserved. 0x0 R 0 SPI_I_TUNE_R_ CAL_TERMBLK1 Rising edge of this bit starts a termination calibration routine. 0x0 R/W 0x2AE TERM_BLK2_ CTRLREG0 [7:1] RESERVED Reserved. 0x0 R 0 SPI_I_TUNE_R_ CAL_TERMBLK2 Rising edge of this bit starts a termination calibration routine. 0x0 R/W 0x300 GENERAL_ JRX_CTRL_0 7 RESERVED Reserved. 0x0 R 6 CHECKSUMMODE JESD204B link parameter checksum calculation method. 0x0 R/W 0 checksum is the sum of fields. 1 checksum is the sum of octets. [5:4] RESERVED Reserved 0x0 R/W 3 DUALLINK This register selects either single link or dual link mode. 0x0 R/W 0 Single link mode. 1 Dual link mode. 2 CURRENTLINK To select which QBD register map to work with. 0x0 R/W 0 User access to QBD_0 registers. 1 User access to QBD_1 registers. [1:0] ENLINKS Brings up JESD204B Rx digital when all link parameters are programmed and all clocks are ready 0x0 R/W Bit 0 applies to Link 0 while Bit 1 applies to Link 1. Link 1 is only available in dual link mode. Both links may be brought up separately or together. 0x301 GENERAL_ JRX_CTRL_1 [7:3] RESERVED Reserved. 0x0 R [2:0] SUBCLASSV_ LOCAL JESD204B Subclass 0x1 R/W 0 Subclass 0 1 Subclass 1 |
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