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AS3900 Datasheet(PDF) 40 Page - ams AG |
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AS3900 Datasheet(HTML) 40 Page - ams AG |
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40 / 59 page  www.austriamicrosystems.com/RF-Transceivers/AS3900 Revision 1.00c 40 - 59 AS3900 Data Sheet - Detail ed Description 8.9.3.1 Main Register Bank (ADDRESS 0x00 bit<0>=0) Table 38. Main Register Bank (ADDRESS 0x00 bit<0>=0) Address Register Name Bit Type Description Control Register section 0x00 ma_sen [7] R/W Master / Client selector 0Client 1Master osc_32 [6] Enable for 32kHz oscillator manually 0 Disabled 1 Enabled timdis [5] Timer disable 0 Enabled 1 Disabled unidir [4] Select unidirectional transceiver mode 0 Bidirectional 1 Unidirectional stream [3] Stream mode control 0 Disabled 1 Enabled wake_rx [2] Wakeup receiver enable 0 Disabled 1 Enabled pwr [1] Power enable 0OFF 1ON bank [0] Bank selection bit 0 Main Bank selected 1 Shadow Bank selected |
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