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VR4102 Datasheet(PDF) 242 Page - NEC |
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VR4102 Datasheet(HTML) 242 Page - NEC |
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242 / 701 page ![]() CHAPTER 10 BCU (BUS CONTROL UNIT) 242 10.2.5 BCURFCNTREG (0x0B00 000E) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved BRF[13] BRF[12] BRF[11] BRF[10] BRF[9] BRF[8] R/W R R R/W R/W R/W R/W R/W R/W RTCRST 0 0 0 0 0 0 1 0 Other resets 0 0 Undefined Undefined Undefined Undefined Undefined Undefined Bit D7 D6D5 D4D3D2 D1 D0 Name BRF[7] BRF[6] BRF[5] BRF[4] BRF[3] BRF[2] BRF[1] BRF[0] R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 0 0 0 0 0 0 0 0 Other resets Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Bit Name Function D[15..14] Reserved Write 0 when writing. 0 is returned after a read. D[13..0] BRF[13..0] Use this bit to set the number of refresh cycles (with TClock cycle). This register is used to specify the number of refresh cycles (with Tclock cycle). |
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