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VR4102 Datasheet(PDF) 243 Page - NEC |
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VR4102 Datasheet(HTML) 243 Page - NEC |
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243 / 701 page ![]() CHAPTER 10 BCU (BUS CONTROL UNIT) 243 10.2.6 REVIDREG (0x0B00 0010) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name RID[3] RID[2] RID[1] RID[0] MJREV[3] MJREV[2] MJREV[1] MJREV[0] R/W R RR RRR R R RTCRST 0 0 0 1 Undefined Undefined Undefined Undefined Other resets 0 0 0 1 Undefined Undefined Undefined Undefined Bit D7 D6D5 D4D3D2 D1 D0 Name Reserved Reserved Reserved Reserved MNREV[(3] MNREV[2] MNREV[1] MNREV[0] R/W R RR RRR R R RTCRST 0 0 0 0 Undefined Undefined Undefined Undefined Other resets 0 0 0 0 Undefined Undefined Undefined Undefined Bit Name Function D[15..12] RID[3:0] This is the processor revision ID. 0x01 indicates the VR4102. D[11..8] MJREV[3..0] Major revision number D[7..4] Reserved Write 0 when writing. 0 is returned after a read. D[3..0] MNREV[3..0] Minor revision number This register is used to indicate revisions of the VR4102’s peripheral units. The revision number is stored as a value in the form y.x, where y is a major revision number and x is a minor revision number. Major revision number and minor revision number can distinguish the revision of the CPU and the peripheral units, however there is no guarantee that changes to the CPU and the peripheral units will necessarily be reflected in this register, or that changes to the revision number necessarily reflect real CPU’s and units’ changes. For this reason, these values are not listed and software should not rely on the revision number in PREVIDREG to characterize the units. |
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