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VR4102 Datasheet(PDF) 238 Page - NEC |
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VR4102 Datasheet(HTML) 238 Page - NEC |
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238 / 701 page ![]() CHAPTER 10 BCU (BUS CONTROL UNIT) 238 10.2.2 BCUCNTREG 2 (0x0B00 0002) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved R/W R RR RRR R R RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit D7 D6D5 D4D3D2 D1 D0 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved GMODE R/W R RR RRR R R/W RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D[15..1] Reserved Write 0 when writing. 0 is returned after a read. D[0] GMODE This is the access data control bit for LCD space. 1 : Do not invert the access data for LCD space 0 : Invert the access data for LCD space This register is used to specify whether data is inverted (translated to 2’s complement) or not when accessing the LCD space. The LCD space is accessed when the ISAM/LCD bit of BCUCNTREG1 is 0. When it is 1, this address space is used as the ISA high-speed memory space. In this case, the contents of the BCUCNTREG2 register are invalid, and inversion of access data is not performed. |
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