VR4102 datasheet(235/701 Pages) NEC

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235

CHAPTER 10 BCU (BUS CONTROL UNIT)

This chapter describes the BCU’s operations and register settings.

10.1 GENERAL

In the VR4102, the BCU receives data that has passed via the VR4100 CPU core and the SysAD bus. The BCU

also controls external agents via the system bus, such as an LCD controller, DRAM, ROM (Flash memory or masked

ROM), or PCMCIA controller, and it transmits and receives data with these external agents via the ADD bus and

DATA bus.

10.2 REGISTER SET

The BCU registers are listed below.

Table 10-1. BCU Registers

Address

R/W

Function

0x0B00 0000

R/W

BCUCNTREG 1

BCU Control Register 1

0x0B00 0002

R/W

BCUCNTREG 2

BCU Control Register 2

0x0B00 000A

R/W

BCUSPEEDREG

BCU Access Cycle Change Register

0x0B00 000C

R/W

BCUERRSTREG

BCU BUS ERROR Status Register

0x0B00 000E

R/W

BCURFCNTREG

BCU Refresh Control Register

0x0B00 0010

REVIDREG

Revision ID Register

0x0B00 0012

R/W

BCURFCOUNTREG

BCU Refresh Count Register

0x0B00 0014

R/W

CLKSPEEDREG

Clock Speed Register

Each register is described in detail as follows.

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