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VR4102 Datasheet(PDF) 321 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 321 Page - NEC

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CHAPTER 15 PMU (POWER MANAGEMENT UNIT)
321
15.1.3 Power-on Control
The causes of CPU activation (mode change from shutdown mode or Hibernate mode to Fullspeed mode) are
called power-on factors. There are twelve power-on factors: a power switch interrupt (POWER), eight types of
GPIO activation interrupts (GPIO[12:9], GPIO[3..0]), a DCD interrupt (DCD#), a touch panel interrupt, and an alarm
interrupt.
Battery low detection is a factor that prevents CPU activation.
(1) Activation via Power Switch Interrupt
When the POWER signal is asserted, the PMU asserts the POWERON signal and provides external notification
that the CPU is being activated. After asserting the POWERON signal, the PMU checks the BATTINH signal and
then de-asserts the POWERON signal.
If the BATTINH/BATTINT# signal is high (“1”), the PMU cancels peripheral unit reset, then starts the Cold Reset
sequence to activate the CPU core.
If the BATTINH/BATTINT# signal is low (“0”), the PMU sets “1” to PMUINTREG’s BATTINH bit and then performs
another shutdown. After the CPU is restarted, the BATTINH bit must be checked and cleared (to “0”) by software.
Figure 15-1. Activation via Power Switch Interrupt (BATTINH/BATTINT# = 1)
BATTINH/
BATTINT# (i)
MPOWER(o)
POWERON(o)
POWER(i)
RTC(Internal)
H
Figure 15-2. Activation via Power Switch Interrupt (BATTINH/BATTINT# = 0)
BATTINH/
BATTINT# (i)
MPOWER(o)
POWERON(o)
POWER(i)
RTC(Internal)
L
L



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