VR4102 datasheet(324/701 Pages) NEC

324 / 701 page

CHAPTER 15 PMU (POWER MANAGEMENT UNIT)

324

(4) Activation via Alarm Interrupt

When the alarm interrupt (alarm_intr) signal is asserted, the PMU asserts the POWERON signal and provides

external notification that the CPU is being activated. After asserting the POWERON signal, the PMU checks the

BATTINH/BATTINT# signal and then de-asserts the POWERON signal.

If the BATTINH/BATTINT# signal is high (“1”), the PMU cancels peripheral unit reset, then starts the Cold Reset

sequence to activate the CPU core.

If the BATTINH/BATTINT# signal is low (“0”), the PMU sets “1” to PMUINTREG’s BATTINH bit and then performs

another shutdown. After the CPU is restarted, the BATTINH bit must be checked and cleared (to “0”) by software.

Figure 15-7. Activation via Alarm Interrupt (BATTINH/BATTINT# = 1)

BATTINH/

BATTINT#(i)

MPOWER(o)

POWERON(o)

alarm_intr(Internal)

RTC(Internal)

Figure 15-8. Activation via Alarm Interrupt (BATTINH/BATTINT# = 0)

BATTINH/

BATTINT#(i)

MPOWER(o)

POWERON(o)

alarm_intr(Internal)

RTC(Internal)

15.1.4 Power Mode

The VR4102 supports the following four power modes.

— Fullspeed mode

— Standby mode

— Suspend mode

— Hibernate mode

Figure 15-9 illustrates the transition between the different power modes.

VR4102 Datasheet(PDF) 324 Page - NEC