VR4102 datasheet(320/701 Pages) NEC

320 / 701 page

CHAPTER 15 PMU (POWER MANAGEMENT UNIT)

320

15.1.2 Shutdown Control

The operations of the RTC, peripheral units, CPU core, and PMUINTREG bit settings during a reset are listed

below.

Table 15-2. Bit Operations during Shutdown

Shutdown type

RTC

Peripheral units

CPU core

PMUINTREG

HAL timer shutdown

Active

Reset

Cold reset

HALTIMERRST=1

Deadman’s SW shutdown

Active

Reset

Cold reset

TIMOUTRST=1

Software shutdown

Active

Reset

Cold reset

Battery low shutdown

Active

Reset

Cold reset

BATTINH=1

Battery lock cancel shutdown

Active

Reset

Cold reset

(1) HAL Timer Shutdown

After the CPU is activated (following the mode change from Shutdown or Hibernate mode to Fullspeed mode),

the software must write “1” to PMUCNTREG’s HALTIMERRST bit within about four seconds to clear the HAL

timer.

If the HAL timer is not reset within about four seconds after the CPU is activated, the PMU resets all peripheral

units except for RTC and PMU. Next, it asserts the ccoldresetb and creset signals (internal) and resets the CPU

core.

In addition, the TIMOUTRST bit in PMUINTREG is set (to “1”). After the CPU is restarted, the TIMOUTRST bit

must be checked and cleared (to “0”) by software.

(2) Deadman’s SW Shutdown

When the Deadman’s SW function is enabled, the software must write “1” to DSUCLRREG’s DSWCLR bit each

time a Deadman’s SW setting is made, to clear the Deadman’s SW counter (for details, see Chapter 17).

If the Deadman’s SW counter is not cleared during a Deadman’s SW setting, the PMU resets all peripheral units

except for RTC and PMU. Next, it asserts the ccoldresetb and creset signals (internal) and resets the CPU core.

In addition, the DMSRST bit in PMUINTREG is set (to “1”). After the CPU is restarted, the DMSRST bit must be

checked and cleared (to “0”) by software.

(3) Software Shutdown

When the HIBERNATE instruction is executed, the PMU checks for currently pending interrupts. If there are no

pending interrupts, it stops the CPU clock. It then resets all peripheral units except for RTC and PMU.

The PMU register contents do not change.

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