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VR4102 Datasheet(PDF) 504 Page - NEC |
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VR4102 Datasheet(HTML) 504 Page - NEC |
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504 / 701 page  CHAPTER 26 FIR (FAST IrDA INTERFACE UNIT) 504 26.2.6 IMR (0x0C00 0054) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved R/W RRR RR RR R RTCRST 000 00 00 0 Other resets 0 0 0 0 0 0 0 0 Bit D7D6D5 D4D3 D2D1 D0 Name IMR7 IMR6 IMR5 IMR4 IMR3 IMR2 IMR1 IMR0 R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 000 00 00 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D15 to D8 Reserved Write 0 when writing. 0 is returned after a read. D7 to D0 IMR7 to 0 These bits are used to enable/prohibit interrupt output. This register sets whether or not to inform outside when the interrupt is generated. Each bit corresponds to the equivalent IFR register bit. When interrupt output is enabled and corresponding bit is 1, interrupt output is active. IMRn Interrupt output 0 1 Prohibit Enable [Caution] The IFR register is set irrespective of this register’s setting. |
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