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VR4102 Datasheet(PDF) 522 Page - NEC |
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VR4102 Datasheet(HTML) 522 Page - NEC |
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522 / 701 page ![]() CHAPTER 26 FIR (FAST IrDA INTERFACE UNIT) 522 26.2.19 MRXF (0x0C00 0070) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved MRXF12 MRXF11 MRXF10 MRXF9 MRXF8 R/W R R R R/W R/W R/W R/W R/W RTCRST 000 00 00 0 Other resets 0 0 0 0 0 0 0 0 Bit D7D6D5 D4D3 D2D1 D0 Name MRXF7 MRXF6 MRXF5 MRXF4 MRXF3 MRXF2 MRXF1 MRXF0 R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 000 00 00 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D15 to D13 Reserved Write 0 when writing. 0 is returned after a read. D12 to D0 MRXF12 to MRXF0 Specifies receivable maximum frame size. MRXF MAX Tx Frame length 0x0000 1 byte 0x0001 2 bytes :: 0x1FFF 2 Kbytes [Function] The maximum frame size is stored in this register. When a 1-frame receive data is transferred to the receive FIFO exceeding the receivable maximum frame size set by this register, an error occurs even under frame reception to end the current frame reception. This sets bit 1 of the RXSTS register. After the receive FIFO is cleared, if the number of received frames is less than 7 frames, it is possible to continue frame reception. To receive 8 or more frames, read all the data and frames that are already received from the receive FIFO, then clear the receive FIFO and restart reception. When receiving data via the DMA operation, set the transfer size value by the following expression: DMA receivable capacitance = set value x 7 frames Caution The data exceeding the maximum size cannot be transferred to the FIFO. |
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