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VR4102 Datasheet(PDF) 531 Page - NEC |
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VR4102 Datasheet(HTML) 531 Page - NEC |
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531 / 701 page ![]() CHAPTER 27 CPU INSTRUCTION SET DETAILS 531 ADDI Add Immediate ADDI rs ADDI 0 0 1 0 0 0 rt immediate 31 26 25 21 20 16 15 0 65 5 16 Format: ADDI rt, rs, immediate Description: The 16-bit immediate is sign-extended and added to the contents of general register rs to form the result. The result is placed into general register rt. In 64-bit mode, the operand must be valid sign-extended, 32-bit values. An overflow exception occurs if carries out of bits 30 and 31 differ (2’s complement overflow). The destination register rt is not modified when an integer overflow exception occurs. Operation: 32 T: GPR [rt] <- GPR [rs] + (immediate15) 16 || immediate15...0 64 T: temp <- GPR [rs] + (immediate15) 48 || immediate15...0 GPR [rt] <- (temp31) 32 || temp31...0 Exceptions: Integer overflow exception |
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