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VR4102 Datasheet(PDF) 534 Page - NEC |
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VR4102 Datasheet(HTML) 534 Page - NEC |
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534 / 701 page ![]() CHAPTER 27 CPU INSTRUCTION SET DETAILS 534 AND And AND rs SPECIAL 0 0 0 0 0 0 rt rd 0 0 0 0 0 0 AND 1 0 0 1 0 0 31 26 25 21 20 16 15 11 10 6 5 0 6 5555 6 Format: AND rd, rs, rt Description: The contents of general register rs are combined with the contents of general register rt in a bit-wise logical AND operation. The result is placed into general register rd. Operation: 32 T: GPR [rd] <- GPR [rs] and GPR [rt] 64 T: GPR [rd] <- GPR [rs] and GPR [rt] Exceptions: None |
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