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VR4102 Datasheet(PDF) 590 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 590 Page - NEC

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CHAPTER 27 CPU INSTRUCTION SET DETAILS
590
JALR
Jump And Link Register
JALR
rs
SPECIAL
0 0 0 0 0 0
0
0 0 0 0 0
rd
0
0 0 0 0 0
JALR
0 0 1 0 0 1
31
26 25
21 20
16 15
11 10
6 5
0
6
5555
6
Format:
JALR rs
JALR rd, rs
Description:
The program unconditionally jumps to the address contained in general register
rs, with a delay of one instruction.
The address of the instruction after the delay slot is placed in general register
rd. The default value of rd, if
omitted in the assembly language instruction, is 31.
Register specifiers
rs and rd may not be equal, because such an instruction does not have the same effect when
re-executed. However, an attempt to execute this instruction is
not trapped, and the result of executing such an
instruction is undefined.
Since instructions must be word-aligned, a Jump and Link Register instruction must specify a target register (
rs)
which contains an address whose two low-order bits are zero. If these low-order bits are not zero, an address
error exception will occur when the jump target instruction is subsequently fetched.
Operation:
32,64 T:
temp <- GPR [rs]
GPR [rd] <- PC + 8
T+1: PC <- temp
Exceptions:
None



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