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VR4102 Datasheet(PDF) 159 Page - NEC |
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VR4102 Datasheet(HTML) 159 Page - NEC |
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159 / 701 page  CHAPTER 6 EXCEPTION PROCESSING 159 6.3 EXCEPTION PROCESSING REGISTERS This section describes the CP0 registers that are used in exception processing. Table 6-1 lists these registers, along with their number-each register has a unique identification number that is referred to as its register number. The CP0 registers not listed in the table are used in memory management (see Chapter 5 for details). The exception handler examines the CP0 registers during exception processing to determine the cause of the exception and the state of the CPU at the time the exception occurred. The registers in Table 6-1 are used in exception processing, and are described in the sections that follow. Table 6-1. CP0 Exception Processing Registers Register name Register number Context register 4 BadVAddr register 8 Count register 9 Compare register 11 Status register 12 Cause register 13 EPC register 14 WatchLo register 18 WatchHi register 19 XContext register 20 Parity Error register 26 Cache Error register 27 ErrorEPC register 30 |
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