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FXLS93421 Datasheet(PDF) 43 Page - NXP Semiconductors

Part # FXLS93421
Description  Dual channel inertial sensor
PDF  254 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS93421 Datasheet(HTML) 43 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
Bit
Type[1] Address Register
7
6
5
4
3
2
1
0
UF0
$E9
USERDATA_9
USERDATA_9[7:0]
UF0
$EA
USERDATA_A
USERDATA_A[7:0]
UF0
$EB
USERDATA_B
USERDATA_B[7:0]
UF0
$EC
USERDATA_C
USERDATA_C[7:0]
UF0
$ED
USERDATA_D
USERDATA_D[7:0]
UF0
$EE
USERDATA_E
USERDATA_E[7:0]
F
$EF
CRC_UF0
LOCK_UF0
REGE_BLOCKID[2:0]
CRC_UF0[3:0]
UF1
$F0
USERDATA_10
USERDATA_10[7:0]
UF1
$F1
USERDATA_11
USERDATA_11[7:0]
UF1
$F2
USERDATA_12
USERDATA_12[7:0]
UF1
$F3
USERDATA_13
USERDATA_13[7:0]
UF1
$F4
USERDATA_14
USERDATA_14[7:0]
UF1
$F5
USERDATA_15
USERDATA_15[7:0]
UF1
$F6
USERDATA_16
USERDATA_16[7:0]
UF1
$F7
USERDATA_17
USERDATA_17[7:0]
UF1
$F8
USERDATA_18
USERDATA_18[7:0]
UF1
$F9
USERDATA_19
USERDATA_19[7:0]
UF1
$FA
USERDATA_1A
USERDATA_1A[7:0]
UF1
$FB
USERDATA_1B
USERDATA_1B[7:0]
UF1
$FC
USERDATA_1C
USERDATA_1C[7:0]
UF1
$FD
USERDATA_1D
USERDATA_1D[7:0]
UF1
$FE
USERDATA_1E
USERDATA_1E[7:0]
F
$FF
CRC_UF1
LOCK_UF1
REGF_BLOCKID[2:0]
CRC_UF1[3:0]
Table 48. User accessible data - traceability information...continued
[1]
Memory Type Codes
R - Readable Register with No OTP
F – User Readable Register with OTP
UF0 – One Time User Programmable OTP Location Region 0
UF1 – One Time User Programmable OTP Location Region 1
UF2 – One Time User Programmable OTP Location Region 2
R/W – User Writable Register
11.2 Register definitions
11.2.1 Rolling counter register (COUNT)
The count register is a read-only register which provides the current value of a free-
running 8-bit counter derived from the primary oscillator. A 10-bit prescaler divides the
primary oscillator frequency by 1000. Thus, the value in the register increases by one
count every 100 µs and the counter rolls over every 25.6 ms.
This register is readable in DSI3 mode, SPI mode, I2C mode or PSI5 Programming
Mode.
Location
Bit
Address
Register
7
6
5
4
3
2
1
0
$00
COUNT
COUNT[7:0]
Reset Value
0
0
0
0
0
0
0
0
Table 49. Rolling counter register (COUNT)
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
43 / 254



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