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FXLS93421 Datasheet(PDF) 61 Page - NXP Semiconductors

Part # FXLS93421
Description  Dual channel inertial sensor
PDF  254 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS93421 Datasheet(HTML) 61 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
Location
Bit
Address
Register
7
6
5
4
3
2
1
0
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
FXLS93xxx
Unprogrammed
Default PSI5 Mode
1
1
0
0
0
0
0
0
$1B
SOURCEID_1
SID1_EN
RESERVED
RESERVED
RESERVED
SOURCEID_1[3:0]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
$1C
SOURCEID_2
SID2_EN
RESERVED
RESERVED
RESERVED
SOURCEID_2[3:0]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
FXLS93xxx
Unprogrammed
Default PSI5 Mode
1
0
0
0
0
0
0
0
$1D
SOURCEID_3
SID3_EN
RESERVED
RESERVED
RESERVED
SOURCEID_3[3:0]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
Table 89. Source identification registers (SOURCEID_x)...continued
11.2.13.1 Data source enable bits (SIDx_EN)
The SIDx_EN bits enable the data source for the associated source identification as
described in Section 11.2.13.3.
11.2.13.2 PDCM format control bits (PDCMFORMAT[2:0])
In DSI3 mode, the PDCM format control bits set the PDCM field sizes as shown in
Table 90. See Section 12.4.2 for PDCM response format details.
PDCMFORMAT[2:0]
Source ID field
size (Bits)
Keep alive
counter field
size (Bits)
Status field size
(Bits)
Data field size
(Bits)
Total
including CRC
(Bits)
0
0
0
0
2
4
10
24
0
0
1
4
2
4
10
28
0
1
0
0
0
4
12
24
0
1
1
4
0
4
12
28
1
0
0
0
2
0
10
20
1
0
1
0
0
0
16
24
1
1
0
0
0
4
16
28
1
1
1
4
0
4
16
32
Table 90. PDCM format control bits (PDCMFORMAT[2:0])
In PSI5 mode, the PDCM format control bits set the PSI5 response format as shown
in Table 91. See Section 13.3.2 for PSI5 response format details. Note: the data field
size applies to all modes except Programming Mode which has a fixed size of 10 bits.
The user must take care to prevent from combining incompatible data field sizes and
transmission times.
PDCMFORMAT[2:0]
Data field size (Bits)
0
x
x
10
1
x
x
16
Table 91. PDCM format control bits
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
61 / 254



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