FXLS93421 datasheet(91/254 Pages) NXP

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NXP Semiconductors

FXLS9xxxx

Dual channel inertial sensor

ARM_WS_N[1]

ARM_WS_N[0]

ARM_WS_P[1]

ARM_WS_P[0]

Sample count limit

Don't Care

Table 161. Arming count limit definitions (count mode)

11.2.29 Arming threshold registers (CHx_ARM_T_P, CHx_ARM_T_N)

The arming threshold registers contain the positive and negative thresholds to be used

by the arming function for each channel. Refer to Section 11.9 for more details regarding

the arming function.

These registers can be written during initialization but are locked once the ENDINIT bit

is set. Refer to Section 11.2.6. The registers are included in the read/write array error

detection.

Location

Bit

Address

$46

CH0_ARM_T_P

ARM_T_P[7:0]

$47

CH0_ARM_T_N

ARM_T_N[7:0]

$4E

CH1_ARM_T_P

ARM_T_P[7:0]

$4F

CH1_ARM_T_N

ARM_T_N[7:0]

Unprogrammed OTP Value

Table 162. Arming threshold registers (CHx_ARM_T_P, CHx_ARM_T_N)

The values programmed into the threshold registers are the threshold values used for the

arming function as described in Section 11.9. The threshold registers hold independent

unsigned 8-bit values for each channel and polarity. Each threshold increment is

equivalent to 1 output LSB, 10-bit. Table 163 shows examples of some threshold register

values and the corresponding threshold.

Programmed thresholds

Device

Range

(g)

Sensitivity

(12 bit,

LSB/g)

Arming

thresh-old

resolution

(10 bit,

LSB/g)

Range

of arm

threshold

(g)

Positive

(Decimal)

Negative

(Decimal)

Positive

threshold

(g)

Negative

threshold

(g)

125

16.3760

4.0940

62.2863

–3

33.0161

8.2540

30.8940

123

–3

40.9400

10.2350

24.9145

245

–6

81.8800

20.4700

12.4573

245

–3

127.9375

31.9844

7.9726

223

–3

Table 163. Example threshold register values and corresponding threshold

If either the positive or negative threshold for one channel is programmed to 0x00,

comparisons are disabled for only that polarity. The arming function still operates for the

opposite polarity. If both the positive and negative arming thresholds for one channel are

programmed to 0x00, the arming function for the associated channel is disabled and the

output pin is set to high impedance, regardless of the value of the ARM_CFG bits in the

CHx_CFG_U4 register.

FXLS9xxxx

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Product data sheet

Rev. 6 — 8 February 2021

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