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FXLS93421 Datasheet(PDF) 88 Page - NXP Semiconductors |
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FXLS93421 Datasheet(HTML) 88 Page - NXP Semiconductors |
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88 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor ST_ CTRL[3] ST_ CTRL[2] ST_ CTRL[1] ST_ CTRL[0] Function 16-bit SNSDATAx Register value signed Effect on ST_ INCMPLT bit in Chx_ STAT Effect on ST_ACTIVE bit in Chx_ STAT 0 0 0 0 No Effect Clear when Active 0 0 0 1 Clear on Activation Set When Active 0 0 1 0 Clear on Activation Set When Active 0 0 1 1 DSP writes to the SNS_DATAx_ X registers as configured in the ChxDATATYPEx registers. Sensor Data Clear on Activation Set When Active 0 1 0 0 0x0000 Clear on Activation Set When Active 0 1 0 1 0xAAAA Clear on Activation Set When Active 0 1 1 0 0x5555 Clear on Activation Set When Active 0 1 1 1 DSP write to registers inhibited. 0xFFFF Clear on Activation Set When Active 1 0 0 0 Positive Analog Self-test - Low Clear on Activation Set When Active 1 0 0 1 Negative Analog Self-test - Low Clear on Activation Set When Active 1 0 1 0 Positive Analog Self-test - High Clear on Activation Set When Active 1 0 1 1 Negative Analog Self-test - High Sensor Data Clear on Activation Set When Active 1 1 0 0 Clear on Activation Set When Active 1 1 0 1 Clear on Activation Set When Active 1 1 1 0 Clear on Activation Set When Active 1 1 1 1 Digital Self-test Reference Section 10.8 Clear on Activation Set When Active Table 153. Self-test control bits (ST_CTRL[3:0]) 11.2.27.2 Offset cancellation test limit bits (OC_LIMIT[2:0]) The offset cancellation test limit bits set the offset limits for the offset test at the end of the PSI5 self-test documented in Section 11.6.2.5. The test limits are set as shown in Table 154. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 88 / 254 |
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