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SLG47503 Datasheet(PDF) 115 Page - Dialog Semiconductor

Part # SLG47503
Description  Low Voltage GreenPAK Programmable Mixed-Signal Matrix
PDF  191 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
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SLG47503 Datasheet(HTML) 115 Page - Dialog Semiconductor

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Datasheet
16-Jul-2021
CFR0011-120-00
Revision 2.0
115 of 191
© 2021 Dialog Semiconductor
SLG47502/03
Low Voltage GreenPAK Programmable
Mixed-Signal Matrix
Preliminary
15.4.4 Random Read Command
The Random Read command starts with a Control Byte (with R/W bit set to “0”, indicating a write command) and Word Address
to set the internal byte address, followed by a Start bit, and then the Control Byte for the read (exactly the same as the Byte Write
command). The Start bit in the middle of the command will halt the decoding of a Write command, but will set the internal address
counter in preparation for the second half of the command. After the Start bit, the Bus Master issues a second control byte with
the R/W bit set to “1”, after which the SLG47502/03 issues an Acknowledge bit, followed by the requested eight data bits.
15.4.5 Sequential Read Command
The Sequential Read command is initiated in the same way as a Random Read command, except that once the SLG47502/03
transmits the first data byte, the Bus Master issues an Acknowledge bit as opposed to a Stop condition in a random read. The
Bus Master can continue reading sequential bytes of data, and will terminate the command with a Stop condition.
Figure 102: Current Address Read Command, R/W = 1
Figure 103: Random Read Command
Figure 104: Sequential Read Command
Not used, set to 0
X
X
X
X
A
10
A
9
A
8
R
Control Byte
Data (n)
Control
Code
Block
Address
R/W bit = 1
S
ACK
Acknowledge
bit
Start
bit
P
Stop
bit
No ACK
bit
SDA LINE
Bus Activity
Control
Code
Not used, set to 0
X X X X
A
10
A
9
A
8
W
Control Byte
Word Address (n)
Control
Code
Block
Address
Write bit
S
ACK
Acknowledge
bit
Start
bit
Control Byte
Stop
bit
SDA LINE
Bus Activity
ACK
Data (n)
ACK
P
X X X X
A
10
A
9
A
8
R
S
Read bit
No ACK
bit
Block
Address
X X X X
A
10
A
9
A
8
R
Control Byte
Data (n)
Control
Code
Block
Address
Read bit
S
ACK
Acknowledge
bit
Start
bit
Data (n + 1)
Stop
bit
SDA LINE
Bus Activity
ACK
Data (n + 2)
ACK
ACK
Data (n + x)
P
No ACK
bit



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