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SLG47503 Datasheet(PDF) 121 Page - Dialog Semiconductor |
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SLG47503 Datasheet(HTML) 121 Page - Dialog Semiconductor |
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121 / 191 page ![]() Datasheet 16-Jul-2021 CFR0011-120-00 Revision 2.0 121 of 191 © 2021 Dialog Semiconductor SLG47502/03 Low Voltage GreenPAK Programmable Mixed-Signal Matrix Preliminary 17 Register Definitions 17.1 REGISTER MAP Table 37: Register Map Address Signal Function Register Bit Definition Byte Register Bit Matrix Output 0 0 I2C Write Mask Control Host write data bit-mask: 0: write 1: mask (don't change) (This mask does not effect on NVM write and masks register update) 1 2 3 4 5 6 7 1 8 I2C Virtual Input Control Host Virtual Input Bit 0 9 Host Virtual Input Bit 1 10 Host Virtual Input Bit 2 11 Host Virtual Input Bit 3 12 Host Virtual Input Bit 4 13 Host Virtual Input Bit 5 14 Host Virtual Input Bit 6 15 Host Virtual Input Bit 7 2 16 I2C Reset Control 0: Normal 1: Reset (Self-Clear Bit. Shuts down device (simulates a Chip POR)) 17 Reserved 18 Reserved 19 Reserved 20 Reserved 21 Reserved 22 Reserved 23 Reserved 3 24 I2C Interfaces Base Address Bit[6:3] can be optional selected to GPIOx with I2C_CONTROL_CODE_BITx_SEL configuration 25 26 27 28 29 30 31 I2C Mode Enable 0: I2C mode disable 1: I2C mode enable |
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