P5021 datasheet(123/155 Pages) NXP

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Electrical characteristics

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Freescale Semiconductor

123

2.20.7.4

AC differential receiver Input characteristics

This table provides the Gen1i or 1.5 Gbits/s differential receiver input AC characteristics for the SATA interface. The AC timing

specifications do not include RefClk jitter.

This table provides the differential receiver input AC characteristics for the SATA interface at Gen2i or 3.0 Gbits/s transmission.

The AC timing specifications do not include RefClk jitter.

Deterministic jitter,

fC3dB =fBAUD ÷ 10

USATA_TXDJfB/10

—

0.17

UI p-p

Deterministic jitter,

fC3dB =fBAUD ÷ 500

USATA_TXDJfB/500

—

0.19

UI p-p

Deterministic jitter,

fC3dB =fBAUD ÷ 1667

USATA_TXDJfB/1667

—

0.35

UI p-p

Note:

1. Measured at transmitter output pins peak-to-peak phase variation, random data pattern

Table 86. Gen 1i/1.5G receiver AC specifications

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Typical

Max

Units

Notes

Unit Interval

TUI

666.4333

666.6667

670.2333

—

Total jitter data-data 5 UI

USATA_TXTJ5UI

—

0.43

UI p-p

Total jitter, data-data 250 UI

USATA_TXTJ250UI

—

0.60

UI p-p

Deterministic jitter, data-data 5 UI

USATA_TXDJ5UI

—

0.25

UI p-p

Deterministic jitter, data-data 250 UI

USATA_TXDJ250UI

—

0.35

UI p-p

Note:

1. Measured at receiver

Table 87. Gen 2i/3G receiver AC specifications

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Typical

Max

Units

Notes

Unit Interval

TUI

333.2167

333.3333

335.1167

—

Total jitter fC3dB =fBAUD ÷ 10

USATA_TXTJfB/10

—

0.46

UI p-p

Total jitter fC3dB =fBAUD ÷ 500

USATA_TXTJfB/500

—

0.60

UI p-p

Total jitter fC3dB =fBAUD ÷ 1667

USATA_TXTJfB/1667

—

0.65

UI p-p

Table 85. Gen 2i/3 G transmitter AC specifications (continued)

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Typ

Max

Units

Notes

P5021 Datasheet(PDF) 123 Page - NXP Semiconductors

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