LTC2977 datasheet(36/138 Pages) AD

36 / 138 page

LTM4664A

Rev. 0

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Three dedicated pins for ALERT, PGOOD_C0/PGOOD_C1

functions are provided. The shutdown operation also

allows all faults to be individually masked and can be

operated in either unlatched (hiccup) or latched modes.

Individual status commands enable fault reporting over

the serial bus to identify the specific fault event. Fault or

warning detection includes the following:

Output Undervoltage/Overvoltage

Input Undervoltage/Overvoltage

Input and Output Overcurrent

Internal Overtemperature

Communication, Memory or Logic (CML) Fault

EEPROM WITH ECC

The LTM4664A PSM dual 25A/30A regulators contain

internal EEPROM with ECC (Error Correction Coding) to

store user configuration settings and fault log informa-

tion. EEPROM endurance retention and mass write oper-

ation time are specified in the Electrical Characteristics

and Absolute Maximum Ratings sections. Write opera-

tions above TJ = 85°C are possible although the Electrical

Characteristics are not guaranteed and the EEPROM will

be degraded. Read operations performed at temperatures

between –40°C and 125°C will not degrade the EEPROM.

Writing to the EEPROM above 85°C will result in a deg-

radation of retention characteristics. The fault logging

function, which is useful in debugging system problems

that may occur at high temperatures, only writes to fault

log EEPROM locations. If occasional writes to these reg-

isters occur above 85°C, the slight degradation in the data

retention characteristics of the fault log will not take away

from the usefulness of the function.

It is recommended that the EEPROM not be written when

the die temperature is greater than 85°C. If the die tem-

perature exceeds 130°C, the LTM4664A PSM will disable

all EEPROM write operations. All EEPROM write opera-

tions will be re-enabled when the die temperature drops

below 125°C. (The controller will also disable all the

switching when the die temperature exceeds the internal

overtemperature fault limit 160°C with a 10°C hysteresis).

The degradation in EEPROM retention for temperatures

>125°C can be approximated by calculating the dimen-

sionless acceleration factor using the following equation:

= e

⎛

⎝⎜

⎞

⎠⎟

•

USE +273

–

STRESS +273

⎛

⎝⎜

⎞

⎠⎟

⎡

⎣

⎢

⎤

⎦

⎥

where:

AF = acceleration factor

Ea = activation energy = 1.4eV

K = 8.617 • 10–5 eV/°K

TUSE = 125°C specified junction temperature

TSTRESS = actual junction temperature in °C

Example: Calculate the effect on retention when operating

at a junction temperature of 135°C for 10 hours.

TSTRESS = 130°C

TUSE = 125°C,

AF = e([(1.4/8.617 • 10

–5) • (1/398 – 1/403)] ) = 16.6

The equivalent operating time at 125°C = 16.6 hours.

Thus the overall retention of the EEPROM was degraded

by 16.6 hours as a result of operating at a junction tem-

perature of 130°C for 10 hours. The effect of the over-

stress is negligible when compared to the overall EEPROM

retention rating of 87,600 hours at a maximum junction

temperature of 125°C.

The integrity of the entire onboard EEPROM is checked with

a CRC calculation each time its data is to be read, such as

after a power-on reset or execution of a RESTORE_USER_

ALL command. If a CRC error occurs, the CML bit is set in

the STATUS_BYTE and STATUS_WORD commands, the

EEPROM CRC Error bit in the STATUS_MFR_SPECIFIC

command is set, and the ALERT and RUN pins pulled

low (PWM channels off). At that point the device will only

respond at special address 0x7C, which is activated only

after an invalid CRC has been detected. The chip will also

respond at the global addresses 0x5A and 0x5B, but use

of these addresses when attempting to recover from a

CRC issue is not recommended. All power supply rails

associated with either PWM channel of a device reporting

an invalid CRC should remain disabled until the issue is

resolved. See the application Information section or contact

DUAL 25A/30A PSM OPERATION

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