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LTC2977 Datasheet(PDF) 43 Page - Analog Devices

Part # LTC2977
Description  30V to 58V Input, Dual 30A, Single 60A 關Module Regulator with Digital Power System Management
PDF  138 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC2977 Datasheet(HTML) 43 Page - Analog Devices

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LTM4664A
43
Rev. 0
For more information www.analog.com
NOTE: Per the PMBus specification, pin programmed
parameters can be overridden by commands from the
digital interface with the exception of ASEL which is
always honored. Do not set any part address to 0x5A or
0x5B because these are global addresses and all parts will
respond to them.
Table 1. VOUTCn _CFG Pin Strapping Look-Up Table for
the LTM4664A’s PSM Output Voltages, Coarse Setting (Not
Applicable if MFR_CONFIG_ALL[6] = 1b)
RVOUTn_CFG
TOP (kΩ)
RVOUTn_CFG*
BOT (kΩ)
VOUTn (V)
SETTING
COARSE
MFR_PWM
MODEn[1] BIT
14.3
Open
NVM
NVM
14.3
32.4
NVM
NVM
14.3
22.6
3.3
0
14.3
18.0
3.1
0
14.3
15.4
2.9
0
14.3
12.7
2.7
0
14.3
10.7
2.5
0, if VTRIMn > 0mV
1, if VTRIMn ≤ 0mV
14.3
9.09
2.3
1
14.3
7.68
2.1
1
14.3
6.34
1.9
1
14.3
5.23
1.7
1
14.3
4.22
1.5
1
14.3
3.24
1.3
1
14.3
2.43
1.1
1
14.3
1.65
0.9
1
14.3
0.787
0.7
1
14.3
0
0.5
1
*RVOUTCn_CFG value indicated is nominal. Select RVOUTCn_CFG from a
resistor vendor such that its value is always within 3% of the value
indicated in the table. Take into account resistor initial tolerance, T.C.R.
and resistor operating temperatures, soldering heat/IR reflow, and
endurance of the resistor over its lifetime. Thermal shock/cycling,
moisture (humidity) and other effects (depending on one’s specific
application) could also affect RVOUTCn_CFG’s value over time. All such
effects must be taken into account in order for resistor pin strapping to
yield the expected result at every SVIN power-up and/or every execution
of MFR_RESET or RESTORE_ USER_ALL, over the lifetime of one’s
product.
Table 2. VTRIMn_CFG Pin Strapping Look-Up Table for the
LTM4664A’s PSM Output Voltages, Fine Adjustment Setting
(Not Applicable if MFR_CONFIG_ALL[6] = 1b)
RVTRIMn_CFG*
BOT (kΩ)
VTRIM (mV) FINE ADJUSTMENT
TO VOUTn SETTING WHEN
RESPECTIVE
RVTRIMn_CFG
TOP (kΩ)
Open
0
14.3
32.4
99
14.3
22.6
86.625
14.3
18.0
74.25
14.3
15.4
61.875
14.3
12.7
49.5
14.3
10.7
37.125
14.3
9.09
24.75
14.3
7.68
12.375
14.3
6.34
–12.375
14.3
5.23
–24.75
14.3
4.22
–37.125
14.3
3.24
–49.5
14.3
2.43
–61.875
14.3
1.65
–74.25
14.3
0.787
–86.625
14.3
0
–99
14.3
*RVTRIMCn_CFG value indicated is nominal. Select RVTRIMCn_CFG from
a resistor vendor such that its value is always within 3% of the value
indicated in the table. Take into account resistor initial tolerance, T.C.R. and
resistor operating temperatures, soldering heat/IR reflow, and endurance
of the resistor over its lifetime. Thermal shock/cycling, moisture
(humidity) and other effects (depending on one’s specific application)
could also affect RVTRIMCn_CFG’s value over time. All such effects must be
taken into account in order for resistor pin strapping to yield the expected
result at every SVIN power-up and/or every execution of MFR_RESET, or
RESTORE_USER_ALL over the lifetime of one’s product.
Example:
ROUTCn_CFG TOP
ROUTCn_CFG BOT
SGND_C0_C1
VOUTCn_CFG PIN
VDD25
DUAL 25A/30A PSM OPERATION



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