LTC2977 datasheet(46/138 Pages) AD

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LTM4664A

Rev. 0

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to cause a microcontroller to poll the fault commands.

Alternatively, the FAULT_Cn pins can be used as inputs

to detect external faults downstream of the controller that

require an immediate response.

Any fault or warning event will always cause the ALERT

pin to assert low unless the fault or warning is masked by

the SMBALERT_MASK. The pin will remain asserted low

until the CLEAR_FAULTS command is issued, the fault bit

is written to a 1 or bias power is cycled or a MFR_RESET

command is issued, or the RUN pins are toggled OFF/

ON or the part is commanded OFF/ON via PMBus or an

ARA command operation is performed. The MFR_FAULT_

PROPAGATE command determines if the FAULT_Cn pins

are pulled low when a fault is detected.

Output and input fault event handling is controlled by the

corresponding fault response byte as specified in Table 3

thru 17. Shutdown recovery from these types of faults

can either be autonomous or latched. For autonomous

recovery, the faults are not latched, so if the fault con-

ditions not present after the retry interval has elapsed, a

new soft-start is attempted.

If the fault persists, the controller will continue to retry.

The retry interval is specified by the MFR_RETRY_DELAY

command and prevents damage to the regulator com-

ponents by repetitive power cycling, assuming the fault

condition itself is not immediately destructive. The MFR_

RETRY_DELAY must be greater than 120ms. It can not

exceed 83.88 seconds.

Status Registers and ALERT Masking

Figure 9 summarizes the internal LTM4664A PSM status

registers accessible by PMBus command. These contain

indication of various faults, warnings and other import-

ant operating conditions. As shown, the STATUS_BYTE

and STATUS_WORD commands also summarize con-

tents of other status registers. Refer to PMBus Command

Summary for specific information.

NONE OF THE ABOVE in the STATUS_BYTE indicates that

one or more of the bits in the most-significant nibble of

STATUS_WORD are also set.

In general, any asserted bit in a STATUS_x register also

pulls the ALERT pin low. Once set, ALERT will remain low

until one of the following occurs.

A CLEAR_FAULTS or MFR_RESET Command Is Issued

The Related Status Bit Is Written to a One

The Faulted Channel Is Properly Commanded Off and

Back On

The LTM4664A PSM Successfully Transmits Its

Address During a PMBus ARA

Bias Power Is Cycled

With some exceptions, the SMBALERT_MASK command

can be used to prevent the LTM4664A PSM from assert-

ing ALERT for bits in these registers on a bit-by-bit basis.

These mask settings are promoted to STATUS_WORD

and STATUS_BYTE in the same fashion as the status bits

themselves. For example, if ALERT is masked for all bits

in channel 0 STATUS_VOUT, then ALERT is effectively

masked for the VOUT bit in STATUS_WORD for PAGE 0.

The BUSY bit in STATUS_BYTE also asserts ALERT low

and cannot be masked. This bit can be set as a result of

various internal interactions with PMBus communication.

This fault occurs when a command is received that cannot

be safely executed with one or both channels enabled.

As discussed in the 4:1 Divider Application Information,

BUSY faults can be avoided by polling MFR_COMMON

before executing some commands.

If masked faults occur immediately after power up, ALERT

may still be pulled low because there has not been time

to retrieve all of the programmed masking information

from EEPROM.

Status information contained in MFR_COMMON and

MFR_PADS can be used to further debug or clarify the

contents of STATUS_BYTE or STATUS_WORD as shown,

but the contents of these registers do not affect the state

of the ALERT pin and may not directly influence bits in

STATUS_BYTE or STATUS_WORD.

DUAL 25A/30A PSM OPERATION

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