LTC2977 datasheet(83/138 Pages) AD

83 / 138 page

LTM4664A

Rev. 0

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LAYOUT CHECKLIST/EXAMPLE

The high integration of LTM4664A makes the PCB board

layout very simple and easy. However, to optimize its

electrical and thermal performance, some layout consid-

erations are still necessary.

Use large PCB copper areas for high current paths,

including VINn, GND and VOUTSn. It helps to minimize

the PCB conduction loss and thermal stress.

Place high frequency ceramic input and output capaci-

tors next to the VINSn, GND and VOUTn pins to minimize

high frequency noise.

Place a dedicated power ground layer underneath the

module.

To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between top layer and other power layers.

Do not put vias directly on pads, unless they are capped

or plated over.

Use a separate SGND copper plane for components

connected to signal pins. Connect SGND to GND local

to the LTM4664A.

Use Kelvin sense connections across the input RSENSE

resistor if input current monitoring is used.

For parallel modules, tie the VOUTCn, ,VOSNS+_Cn/

VOSNS–_Cn voltage-sense differential pair lines, RUN_n,

COMP_Cna, COMP_nb pin together. The user must

share the SYNC, SHARE_CLK, FAULT, and ALERT pins

of these parts. Be sure to use pull-up resistors on

FAULT, SHARE_CLK and ALERT.

Bring out test points on the signal pins for monitoring.

Figure 45 gives a good example of the recommended lay-

out. Reference DC2672A demo manual.

Figure 45. Recommended PCB Layout Package Top and Bottom View

DUAL 25A/30A PSM APPLICATIONS INFORMATION

LTM4664A 16 ×16 × 8mm

TOP 4 (1206) FLYING CAPS

2ND STAGE

TOP LAYER

OUTPUT CAPS

INPUT CAP TO

60A CORE (1206)

BOTTOM LAYER

BOTTOM 4 (1210) FLYING CAPS

1ST STAGE

BOTTOM 3 (1206) FLYING CAPS

2ND STAGE

1ST STAGE INPUT CAP (1210)

2ND STAGE INPUT CAP (1206)

4664A F48

TOP 3 (1210) FLYING CAPS 1ST STAGE

LTC2977 Datasheet(PDF) 83 Page - Analog Devices

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