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LTC2977 Datasheet(PDF) 19 Page - Analog Devices |
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LTC2977 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 138 page ![]() LTM4664A 19 Rev. 0 For more information www.analog.com PIN FUNCTIONS 4:1 Divider Section (Stage 1) GND: (A8-A9, B1-B3, B8-B9, B14-B16, C4-C13, D4,D8,D9, D13, E1-E4, E8-E9, E13-E16, F1-F4, F8-F10, G4, G8-G11, H4, H9-H11, J1-J4, J11, K1-K4, K11, L3, L11, L14-L16, M3-M5, M11, M14, N1-N4, N7, N11-N16, P1-P4, P7-P9, P13-P15, R1-R6, R9, R13-16, T2-T3, T8-T9, T14-T15) Main ground pins for all ground returns. Input and output capacitors are connected to these pin. See recommended layout Figure 45. VOUT1: (C14-C16) 1st stage divide by two output pins. These pins connect to the 2nd stage VINS2 pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. INTVCCS1: (D10) Output of the 5.5V internal linear low dropout regulator. The driver and control circuits are pow- ered from this voltage source. Must be bypassed to power ground with a minimum of 4.7μF ceramic or other low ESR capacitor. Do not use the INTVCCS1 pin for any other ICs. EXTVCCS1: (D11) External Power Input to the Internal LDO Connected to INTVCCS1. This LDO supplies INTVCCS1 power, bypassing the internal LDO powered from VINS1 whenever EXTVCCS1 is higher than 6.5V and VINS1 is higher than 7V. Do not exceed 30V on this pin. This pin can be driven with the VOUT2 output to limit power loss in LDO with VINS1 at higher input voltage. See Applications section. PGOODS1: (D12) This is an open drain output pin. PGOODS1 is pulled to ground if there are any faults or the voltage at UVS1 pin is lower than 1V. Use PGOODS1 or FAULTS1 to sequence on RUNS2 for the second stage. UVS1: (E10) Undervoltage Comparator. If the UVS1 pin voltage is lower than 1V, the PGOODS1 pin is pulled down. If the UV pin voltage is higher than 1V and no faults, PGOODS1 pin is released. Connect to INTVCCS1 if not used. This pin is used to validate proper output regulation. FAULTS1: (E11) This is an open drain output pin. FAULTS1 is pulled to ground when the VOUT1 voltage is out of the (VINS1)/2 window threshold or the voltage between INSNSS1+ and INSNSS1– is higher than 50mV. FAULTS1 pin is released after INTVCCS1 starts up and passes UVLO. Use FAULTS1 or PGOODS1 to sequence on RUNS2 for the second stage. FREQS1: (E12) Frequency Set Pin. There is a precision 10μA current flowing out of this pin. A resistor to ground sets a voltage which in turn programs the frequency. See the 4:1 Divider Application Information section for detailed information. RUNS1: (F11) Stage 1 Run Control Input. Forcing RUNS1 below 1.2V shuts down the controller. When RUNS1 is higher than 1.2V, internal circuitry starts up. There is a 1μA pull-up current flowing out of RUNS1 pin when the RUNS1 pin voltage is below 1.2V and an additional 5μA current flowing out of RUNS1 pin when the RUNS1 pin voltage is above 1.2V. TIMERS1: (F12) Charge Balance and Fault Timer Control Input. A capacitor between this pin and ground sets the amount of time to charge VOUT1 to (VINS1)/2. It also sets the short-circuit retry time. See the 4:1 Divider Application Information. HYS_PRGMS1: (G12) A resistor connected between this pin and ground will set the window threshold of the window comparator that monitors the voltage difference between (VINS1)/2 and VOUT1. There is a 10μA current flowing out of this pin. See Applications section. SW1, SW2: (G14-G16), (D14-D16) Switching nodes for the 1st stage CFLY Flying capacitor. See Block Diagram. I INSNSS1–: (J13) Current sense comparator negative input, connected to the negative node of the current sens- ing resistor. Short to INSNSS1+ if not used. NSNSS1+: (J14) Current sense comparator positive input, connected to the positive node of the external current sensing resistor. The current sensing resistor has to be placed on the drain of the very top MOSFET. When the voltage between INSNSS1+ pin and INSNSS1– pin is higher than 50mV, the Stage 1 controller indicates an overcurrent fault by pulling the FAULTS1 pin down. The INSNSS1+ pin is also used to source 95mA current to the VOUT1 pin during the pre-balance time in divider applications. Connect directly to the drain of the very top MOSFET if not used. See application schematic section. |
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