LTC2977 datasheet(45/138 Pages) AD

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LTM4664A

Rev. 0

For more information www.analog.com

Table 4. ASEL Pin Strapping Look-Up Table to Set the

LTM4664A’s PSM Slave Address (Applicable Regardless of

MFR_CONFIG_ALL[6] Setting)

RASEL* (kΩ)

SLAVE ADDRESS

Open

MFR_ADDRESS[6:0]_R/W

32.4

MFR_ADDRESS[6:4]_1111_R/W

22.6

MFR_ADDRESS[6:4]_1110_R/W

18.0

MFR_ADDRESS[6:4]_1101_R/W

15.4

MFR_ADDRESS[6:4]_1100_R/W

12.7

MFR_ADDRESS[6:4]_1011_R/W

10.7

MFR_ADDRESS[6:4]_1010_R/W

9.09

MFR_ADDRESS[6:4]_1001_R/W

7.68

MFR_ADDRESS[6:4]_1000_R/W

6.34

MFR_ADDRESS[6:4]_0111_R/W

5.23

MFR_ADDRESS[6:4]_0110_R/W

4.22

MFR_ADDRESS[6:4]_0101_R/W

3.24

MFR_ADDRESS[6:4]_0100_R/W

2.43

MFR_ADDRESS[6:4]_0011_R/W

1.65

MFR_ADDRESS[6:4]_0010_R/W

0.787

MFR_ADDRESS[6:4]_0001_R/W

MFR_ADDRESS[6:4]_0000_R/W

Where:

R/W = Read/Write bit in control byte

All PMBus device addresses listed in the specification are 7 bits wide

unless otherwise noted.

Note: The LTM4664A PSM will always respond to slave address 0x5A and

0x5B regardless of the NVM or ASEL resistor configuration values.

*RCFG value indicated is nominal. Select RCFG from a resistor vendor

such that its value is always within 3% of the value indicated in the table.

Take into account resistor initial tolerance, T.C.R. and resistor operating

temperatures, soldering heat/IR reflow, and endurance of the resistor

over its lifetime. Thermal shock cycling, moisture (humidity) and other

effects (depending on one’s specific application) could also affect RCFG’s

value over time. All such effects must be taken into account in order for

resistor pin-strapping to yield the expected result at every SVIN power-up

and/or every execution of MFR_RESET or RESTORE_USER_ALL, over the

lifetime of one’s product.

Example:

SGND_C0_C1

RASEL

ASEL PIN

Table 5. LTM4664A PSM MFR_ADDRESS Command Examples

Expressed in 7- and 8-Bit Addressing

DESCRIPTION

HEX DEVICE

ADDRESS

BIT

7-BIT

8-BIT

7 6 5 4 3 2 1 0 R/W

Rail4

0x5A

0xB4

0 1 0 1 1 0 1 0

Global4

0x5B

0xB6

0 1 0 1 1 0 1 1

Default

0x4F

0x9E

0 1 0 0 1 1 1 1

Example 1

0x40

0x80

0 1 0 0 0 0 0 0

Example 2

0x41

0x82

0 1 0 0 0 0 0 1

Disabled2,3

1 0 0 0 0 0 0 0

Note 1. This table can be applied to the MFR_RAIL_ADDRESSn

commands, but not the MFR_ADDRESS command.

Note 2. A disabled value in one command does not disable the device, nor

does it disable the global address.

Note 3. A disabled value in one command does not inhibit the device from

responding to device addresses specified in other commands.

Note 4. It is not recommended to write the value 0x00, 0x0C (7-bit), 0x5A

(7-bit), 0x5B (7-bit) or 0x7C(7-bit) to the MFR_CHANNEL_ADDRESSn or

the MFR_RAIL_ADDRESSn commands.

FAULT DETECTION AND HANDLING

A variety of fault and warning reporting and handling

mechanisms are available. Fault and warning detection

capabilities include:

Input OV FAULT Protection and UV Warning

Average Input OC Warn

Output OV/UV Fault and Warn Protection

Output OC Fault and Warn Protection

Internal control Die and Internal Module

Overtemperature Fault and Warn Protection

Internal Undertemperature Fault and Warn Protection

CML Fault (Communication, Memory or Logic)

External Fault Detection via the Bidirectional FAULT_Cn

Pins

In addition, the LTM4664A PSM can map any combi-

nation of fault indicators to their respective FAULT_Cn

pin using the propagate FAULTn response commands,

MFR_FAULT_ PROPAGATE. Typical usage of a FAULT_Cn

pin is as a driver for an external crowbar device, over-

temperature alert, overvoltage alert or as an interrupt

DUAL 25A/30A PSM OPERATION

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