LTC2977 datasheet(38/138 Pages) AD

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LTM4664A

Rev. 0

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After the part has initialized, an additional comparator

monitors VINS3. The VIN_ON threshold must be exceeded

before the output power sequencing can begin. After VIN

is initially applied, the part will typically require 70ms to

initialize and begin the TON_DELAY timer. The readback

of voltages and currents may require an additional 0ms

to 90ms.

SOFT-START

The method of start-up sequencing described below is

time-based. The part must enter the run state prior to

soft-start. Stage 2 of the 4:1 Divider will release RUN_C0

and RUN_C1 once it has reached regulation defined by

the program valve set by UVS2, and FAULTn is released.

The RUN_Cn pins are released by the LTM4664A PSM

after the part is initialized and VINS3 is greater than the

VIN_ON threshold. If multiple LTM4664A PSMs are used

in an application, they all hold their respective RUN_Cn

pins low until all devices are initialized and VINS3 exceeds

the VIN_ON threshold for every device. The SHARE_CLK

pin assures all the devices connected to the signal use

the same time base. The SHARE_CLK pin is held low until

the part has been initialized after VINS3 is applied. The

LTM4664A PSM can be set to turn-off (or remain off)

if SHARE_CLK is low (set bit 2 of MFR_CHAN_CONFIG

to 1). This allows the user to assure synchronization

across numerous PSM devices even if the RUN_Cn pins

cannot be connected together due to board constraints. In

general, if the user cares about synchronization between

chips it is best not only to connect all the respective RUN_

Cn pins together but also to connect all the respective

SHARE_CLK pins together and pulled up to VDD33 with a

10k resistor. This assures all chips begin sequencing at

the same time and use the same time base.

After the RUN_Cn pins release and prior to entering a

constant output voltage regulation state, the LTM4664A

PSM performs a monotonic initial ramp or “soft-start” on

each of the 25A/30A outputs. Soft-start is performed by

actively regulating the load voltage while digitally ramping

the target voltage from 0V to the commanded voltage set-

point. Once the LTM4664A dual 25A/30A regulators are

commanded to turn on (after power up and initialization),

the controller waits for the user specified turn-on delay

(TON_DELAY) prior to initiating this output voltage ramp.

The rise time of the voltage ramp can be programmed

using the TON_RISE command to minimize inrush cur-

rents associated with the start-up voltage ramp. The soft-

start feature is disabled by setting the value of TON_RISE

to any value less than 0.25ms. The LTM4664A PWM_Cn

always uses discontinuous mode during the TON_RISE

operation. In discontinuous mode, the bottom MOSFET

is turned off as soon as reverse current is detected in

the inductor. This will allow the regulator to start up into

a prebiased load. When the TON_MAX_FAULT_LIMIT is

reached, the part transitions to continuous mode, if so

programmed. If TON_MAX_FAULT_LIMIT is set to zero,

there is no time limit and the part transitions to the desired

conduction mode after TON_RISE completes and VOUT

has exceeded the VOUT_UV_FAULT_LIMIT and IOUT_OC

is not present. However, setting TON_MAX_FAULT_LIMIT

to a value of 0 is not recommended.

TIME-BASED SEQUENCING

The default mode for sequencing the outputs on and

off is time-based. Each output is enabled after waiting

TON_DELAY amount of time following either a RUN_Cn

pin going high, a PMBus command to turn on or the VIN

rising above a preprogrammed voltage. Off sequencing is

handled in a similar way. To assure proper sequencing,

make sure all ICs connect the SHARE_CLK pin together and

RUN_Cn pins together. If the RUN_Cn pins cannot be con-

nected together for some reasons, set bit 2 of MFR_CHAN_

CONFIG to 1. This bit requires the SHARE_CLK pin to be

clocking before the power supply output can start. When

the RUN_Cn pin is pulled low, the LTM4664A PSM will hold

the pin low for the MFR_ RESTART_DELAY. The minimum

MFR_RESTART_ DELAY is TOFF_DELAY + TOFF_FALL +

136ms. This delay assures proper sequencing of all rails.

The LTM4664A PSM calculates this delay internally and will

not process a shorter delay. However, a longer commanded

MFR_RESTART_DELAY can be used by the part. The max-

imum allowed value is 65.52 seconds.

VOLTAGE-BASED SEQUENCING

The sequence can also be voltage-based. As shown in

Figure 8, The PGOOD_Cn pins are asserted when the

DUAL 25A/30A PSM OPERATION

LTC2977 Datasheet(PDF) 38 Page - Analog Devices

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