MEC1632 datasheet(150/636 Pages) MICROCHIP

150 / 636 page

MEC1632

DS00001592B-page 150

 2012-2018 Microchip Technology Inc.

XTL_SEL

The XTL_SEL bit selects between the 32.768 KHz Crystal Oscillator and the 32.768 KHz Silicon Oscillator:

0 - The clock source for the 32KHz clock domain comes from the internal silicon oscillator (default)

1 - The clock source for the 32KHz clock domain comes from the external crystal oscillator. Note that the external crystal

must be operating before this option is selected.

XOSEL

The XOSEL bit selects whether the 32KHz crystal oscillator is driven by a single-ended input or is connected to a

32.768KHz parallel resonant crystal:

0 - A crystal resonator is connected between the XTAL1 and XTAL2 pins (default)

1 - The XTAL2 pin is used as an input for a single-ended 32 KHz clock; the XTAL1 pin must be tied to VSS.

7.10

Interrupt Interface

The Power, Clocks, and Resets Interrupt Interface inputs include the VBAT RST, FLASH and WDT status bits in the

Power-Fail and Reset Status Register.The Interrupt Interface output is PCR_INT in Table 7-4, “Power, Clocks, and

Resets Port List,” on page 96. The corresponding bit in the EC Interrupt Aggregator is bit PFR in GIRQ23 Source Reg-

ister.

Whenever any Interrupt Interface input is asserted, PCR_INT is asserted; when all Interrupt Interface inputs are not

asserted, PCR_INT is not asserted. PCR_INT may be masked as described in Section 17.0, "EC Interrupt Aggrega-

tor," on page 287.

MEC1632 Datasheet(PDF) 150 Page - Microchip Technology