MEC1632 datasheet(153/636 Pages) MICROCHIP

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 2012-2018 Microchip Technology Inc.

DS00001592B-page 153

MEC1632

8.4

Description

The Embedded Memory Interface contains a Mailbox that enables the Host to send an 8-bit message to the EC and the

EC to send an 8-bit message to the Host. When written by the sender, the messages can generate an interrupt at the

receiver.

In addition to the messages that can be exchanged, the Embedded Memory Interface permits the Host to read and write

a portion of the EC’s Data Closely Coupled Memory (DCCM). Host reads and writes take place without intervention or

assistance from the EC.

The Embedded Memory Interface occupies 12 bytes in the Host I/O space. Two bytes constitute the Host-to-EC and

EC-to-Host message links. Six bytes are used for the interface into the EC DCCM, two for address and four for data.

The four data bytes are used for reads and writes to the EC DCCM DMI.

When the Host reads one of the four bytes in the Embedded Memory Interface data register, data from the DCCM at

the address defined by the Embedded Memory Interface address register is returned to the Host. Writes to a byte write

the corresponding byte in the DCCM. The Embedded Memory Interface can be configured so that, although Host I/O is

always byte at a time, transfers between the Embedded Memory Interface data bytes and the DCCM can configured to

occur as single bytes, 2-byte blocks or 4-byte blocks. This is done so that data that the EC treats as 16-bit or 32-bit will

be consistent in the Host, even though one byte of the DCCM data may change between two or more 8-bit accesses by

the Host.

In addition, there is an auto-increment function for the Embedded Memory Interface address register. When enabled,

the Host can read or write blocks of memory in the DCCM by repeatedly accessing the Embedded Memory Interface

data register, without requiring Host updates to the Embedded Memory Interface address register.

FIGURE 8-2:

EMBEDDED MEMORY INTERFACE SIRQ AND NEM_INT ROUTING

EM Interface

Registers

nEM_INT

GPIO

nEM_INT

Pin Control Register

SIRQ Mapping

SIRQ

EMI_Host_SIRQ

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