MEC1632 datasheet(160/636 Pages) MICROCHIP

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MEC1632

DS00001592B-page 160

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8.6.3

EC ADDRESS REGISTER

ACCESS_TYPE

This field defines the type of access that occurs when the EC Data Register is read or written.

00: 8-bit access. Any byte read of Byte 0 through Byte 3 in the EC Data Register causes the corresponding byte within

the 32-bit double word addressed by EC_Address to be loaded into the byte of EC Data Register and returned by

the read. Any byte write to Byte 0 through Byte 3 in the EC Data Register writes the corresponding byte within the

32-bit double word addressed by EC_Address, as well as the byte of the EC Data Register.

01: 16-bit access. A read of Byte 0 in the EC Data Register causes the 16 bits in the DCCM at an offset of EC_Address

to be loaded into Byte 0 and Byte 1 of the EC Data Register. The read then returns the contents of Byte 0. A read

of Byte 2 in the EC Data Register causes the 16 bits in the DCCM at an offset of EC_Address+2 to be loaded into

Byte 2 and Byte 3 of the EC Data Register. The read then returns the contents of Byte 2. A read of Byte 1 or Byte

3 in the EC Data Register return the contents of the register, without any update from the DCCM.

A write of Byte 1 in the EC Data Register causes Bytes 1 and 0 of the EC Data Register to be written into the 16

bits in the DCCM at an offset of EC_Address. A write of Byte 3 in the EC Data Register causes Bytes 3 and 2 of

the EC Data Register to be written into the 16 bits in the DCCM at an offset of EC_Address+2. A write of Byte 0 or

Byte 2 in the EC Data Register updates the contents of the register, without any change to the DCCM.

10: 32-bit access. A read of Byte 0 in the EC Data Register causes the 32 bits in the DCCM at an offset of EC_Address

to be loaded into the entire EC Data Register. The read then returns the contents of Byte 0. A read of Byte 1, Byte

2 or Byte 3 in the EC Data Register returns the contents of the register, without any update from the DCCM.

A write of Byte 3 in the EC Data Register causes the EC Data Register to be written into the 32 bits in the DCCM

at an offset of EC_Address. A write of Byte 0, Byte 1 or Byte 2 in the EC Data Register updates the contents of the

11: Auto-increment 32-bit access. This defines a 32-bit access, as in the 10 case. In addition, any read or write of Byte

3 in the EC Data Register causes the EC Address Register to be incremented by 1. That is, the EC_Address field

will point to the next 32-bit double word in the DCCM.

EC_ADDRESS[14:2]

This field defines the location in memory that can be read and/or written with the EC Data Register. The address is an

offset from the base of the Host-accessible region in the EC DCCM SRAM. The base of the Host-accessible region.

TABLE 8-7:

EC ADDRESS REGISTER

HOST OFFSET

Byte 0: 02h

Byte 1: 03h

8-bit HOST SIZE

EC OFFSET

02h

16-bit EC SIZE

POWER

VTR

0000h nSYS_RST DEFAULT

BUS

LPC SPB

BYTE1 BIT

D15

D14

D13

D12

D11

D10

HOST TYPE

R/W

EC TYPE

R/W

BIT NAME

Region

EC_Address[14:8]

BYTE0 BIT

D6D5

D4D3D2

HOST TYPE

R/W

EC TYPE

R/W

BIT NAME

EC_Address[7:2]

Access_Type

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