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LXT386LE Datasheet(PDF) 31 Page - Intel Corporation |
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LXT386LE Datasheet(HTML) 31 Page - Intel Corporation |
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31 / 78 page  QUAD T1/E1/J1 Transceiver — LXT386 Datasheet 31 3.7 Loopbacks The LXT386 offers three loopback modes for diagnostic purposes. In hardware mode, the loopback mode is selected with the LOOPn pins. In software mode, the ALOOP, DLOOP and RLOOP registers are employed. 3.7.1 Analog Loopback When selected, the transmitter outputs (TTIP & TRING) are connected internally to the receiver inputs (RTIP & RRING) as shown in Figure 9. Data and clock are output at RCLK, RPOS & RNEG pins for the corresponding transceiver. Note that signals on the RTIP & RRING pins are ignored during analog loopback. Figure 8. Jitter Attenuator Loop FIFO DPLL IN CK OUT CK TPOS RPOSi TNEG RNEGi TCLK RCLKi JASEL0-1 TPOSo RPOS TNEGo RNEG TCLK RCLK JASEL0-1 FIFO64 JACF MCLK GCR control bits x 32 IN OUT Figure 9. Analog Loopback Timing & Control Timing Recovery TTIP TRING RTIP RRING RCLK RPOS RNEG TCLK TPOS TNEG * If Enabled JA* JA* |
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