CLRC663 datasheet(38/177 Pages) NXP

38 / 177 page

NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

8.6 Analog interface and contactless UART

8.6.1 General

The integrated contactless UART supports the external host online with framing and error checking of the

protocol requirements up to 848 kbit/s. An external circuit can be connected to the communication interface pins

SIGIN and SIGOUT to modulate and demodulate the data.

The contactless UART handles the protocol requirements for the communication schemes in co-operation with

the host. The protocol handling itself generates bit- and byte-oriented framing and handles error detection like

Parity and CRC according to the different contactless communication schemes.

The size, the tuning of the antenna, and the supply voltage of the output drivers have an impact on the

achievable field strength. The operating distance between reader and card depends additionally on the type of

card used.

8.6.2 TX transmitter

The signal delivered on pin TX1 and pin TX2 is the 13.56 MHz carrier modulated by an envelope signal for

energy and data transmission. It can be used to drive an antenna directly, using a few passive components for

matching and filtering, see Section 14. The signal on TX1 and TX2 can be configured by the register DrvMode,

see Section 9.8.1.

The modulation index can be set by the TxAmp.

Following figure shows the general relations during modulation

001aan355

time

influenced by set_clk_mode

envelope

TX ASK100

1: Defined by set_cw_amplitude.

2: Defined by set_residual_carrier.

TX ASK10

(1)

(2)

Figure 25. General dependences of modulation

Note: When changing the continuous carrier amplitude, the residual carrier amplitude also changes, while the

modulation index remains the same.

The registers Section 9.8 and Section 9.10 control the data rate, the framing during transmission and the setting

of the antenna driver to support the requirements at the different specified modes and transfer speeds.

CLRC663

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.3 — 3 January 2024

38 / 177

CLRC663 Datasheet(PDF) 38 Page - NXP Semiconductors