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CLRC663 Datasheet(PDF) 98 Page - NXP Semiconductors

Part # CLRC663
Description  High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
PDF  177 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC663 Datasheet(HTML) 98 Page - NXP Semiconductors

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NXP Semiconductors
CLRC663
High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
Bit
Symbol
Description
7 to 6
LPCD_IMax
Defines lowest two bits of the higher border for the low-power card detection (LPCD).
If the measurement value of the I channel is higher than LPCD IMax, an LPCD IRQ is
raised.
5 to 0
LPCD_IMin
Defines the lower border for the low power card detection. If the measurement value of
the I channel is lower than LPCD IMin, an LPCD IRQ is raised.
Table 186. LPCD_IMin bits
9.14.4 LPCD_Result_I
Bit
7
6
5
4
3
2
1
0
Symbol
RFU-
RFU-
LPCD_Result_I
Access
rights
-
-
r
Table 187. LPCD_Result_I register (address 42h)
Bit
Symbol
Description
7 to 6
RFU
-
5 to 0
LPCD_Result_I
Shows the result of the last low-power card detection (I-Channel).
Table 188. LPCD_Result_I bits
9.14.5 LPCD_Result_Q
Bit
7
6
5
4
3
2
1
0
Symbol
RFU
LPCD_
IRQ_Clr
LPCD_Reslult_Q
Access
rights
-
r/w
r
Table 189. LPCD_Result_Q register (address 43h)
Bit
Symbol
Description
7
RFU
-
6
LPCD_IRQ_Clr
If set no LPCD IRQ is raised any more until the next low-power card detection
procedure. Can be used by software to clear the interrupt source.
5 to 0
LPCD_Result_Q
Shows the result of the last low power card detection (Q-Channel).
Table 190. LPCD_Result_Q bits
9.14.6 LPCD_Options
This register is available on the CLRC66303 only. For silicon versions CLRC66301 and CLRC66302 this
register on address 3AH is RFU.
CLRC663
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 5.3 — 3 January 2024
98 / 177



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