CLRC663 datasheet(55/177 Pages) NXP

55 / 177 page

NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

Abort condition: Less than 6 bytes written to the FIFO.

8.10.3.4 MFAuthent command

Command (03h), Parameter1 (Authentication command code 60h or 61h), Parameter2 (block address),

Parameter3 (card serial number byte0), Parameter4 (card serial number byte1), Parameter5 (card serial

number byte2), Parameter6 (card serial number byte3);

This command handles the MIFARE Classic authentication in Reader/Writer mode to ensure a secure

communication to any MIFARE classic card.

When the MFAuthent command is active, any FIFO access is blocked. Anyhow if there is access to the FIFO,

the bit WrErr in the Error register is set.

This command terminates automatically when the MIFARE Classic card is authenticated and the bit

MFCrypto1On is set to logic 1.

This command does not terminate automatically, when the card does not answer, therefore the timer should be

initialized to automatic mode. In this case, beside the bit IdleIRQ the bit TimerIRQ can be used as termination

criteria. During authentication processing the bits RxIRQ and TxIRQ are blocked. The Crypto1On shows if the

authentication was successful. The Crypto1On is always valid.

In case, there is an error during authentication, the bit ProtocolErr in the Error register is set to logic 1 and the

bit Crypto1On in register Status2Reg is set to logic 0.

8.10.3.5 AckReq command

Command (04h);

Performs a Query (Full command must be written into the FIFO); an Ack and a ReqRn command. All answers to

the command will be written into the FIFO. The error flag is copied after the answer into the FIFO.

This command terminates automatically and the then active state is idle.

8.10.3.6 Receive command

Command (05h);

The CLRC663 activates the receiver path and waits for any data stream to be received, according to its register

settings. The registers must be set before starting this command according to the used protocol and antenna

configuration. The correct settings have to be chosen before starting the command.

This command terminates automatically when the received data stream ends. This is indicated either by the end

of frame pattern or by the length byte depending on the selected framing and speed.

Remark: If the bit RxMultiple in the RxModeReg register is set to logic 1, the Receive command does not

terminate automatically. It has to be terminated by activating any other command in the CommandReg register

(see Section 9.17.6).

8.10.3.7 Transmit command

Command (06h); data to transmit

The content of the FIFO is transmitted immediately after starting the command. Before transmitting the FIFO, all

relevant registers have to be set to transmit data.

This command terminates automatically when the FIFO gets empty. It can be terminated by any other command

written to the command register.

CLRC663

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.3 — 3 January 2024

55 / 177

CLRC663 Datasheet(PDF) 55 Page - NXP Semiconductors

CLRC663 Datasheet(HTML) 55 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL