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CLRC663 Datasheet(PDF) 93 Page - NXP Semiconductors

Part # CLRC663
Description  High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
PDF  177 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC663 Datasheet(HTML) 93 Page - NXP Semiconductors

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NXP Semiconductors
CLRC663
High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
Bit
7
6
5
4
3
2
1
0
Symbol
VMid_r_sel
RFU
rcv_hpcf
rcv_gain
Access
rights
r/w
-
r/w
r/w
Table 167. RxAna register (address 39h)
Bit
Symbol
Description
7, 6
VMid_r_sel
Factory trim value, needs to be 0.
5, 4
RFU
3, 2
rcv_hpcf
The rcv_hpcf [1:0] signals allow 4 different settings of the base band amplifier high pass
cut-off frequency from ~40 kHz to ~300 kHz.
1 to 0
rcv_gain
With rcv_gain[1:0] four different gain settings from 30 dB and 60 dB can be configured
(differential output voltage/differential input voltage).
Table 168. RxAna bits
rcv_gain (Hex.)
rcv_hpcf (Hex.)
fl (kHz)
fU (MHz)
gain (dB20)
bandwidth (MHz)
03
00
38
2.3
60
2.3
03
01
79
2.4
59
2.3
03
02
150
2.6
58
2.5
03
03
264
2.9
55
2.6
02
00
41
2.3
51
2.3
02
01
83
2.4
50
2.3
02
02
157
2.6
49
2.4
02
03
272
3.0
41
2.7
01
00
42
2.6
43
2.6
01
01
84
2.7
42
2.6
01
02
157
2.9
41
2.7
01
03
273
3.3
39
3.0
00
00
43
2.6
35
2.6
00
01
85
2.7
34
2.6
00
02
159
2.9
33
2.7
00
03
276
3.4
30
3.1
Table 169. Effect of gain and high-pass corner register settings
CLRC663
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 5.3 — 3 January 2024
93 / 177



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