PM3350-SW datasheet(121/224 Pages) PMC

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ELAN 8X10

PM3350 ELAN 8 X10

DATA SHEET

PMC-970109

ISSUE 3

8 PORT ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY

119

table entry is also decoded and inspected; as this description relates to frames

being forwarded across the PCI bus, the destination address table entry will be

found to be a forwarding tag indicating a remote device as the target of the

frame, or will indicate a multicast, or will be non-existent (in which case the

frame will be flooded, and must be sent across the PCI bus to remote devices).

If a forwarding tag was located during the address lookup for the destination

MAC address, the remote hash bucket pointer is extracted from the SrcHashBkt

field of the forwarding tag and placed in the HashBkt field of the data descriptor;

otherwise, the source hash bucket pointer is placed in the HashBkt field.

The frame has been successfully processed and classified; the source MAC

address statistics (i.e., the per-host statistics in the source hash bucket) and the

per-port statistics are updated appropriately at this time.

The firmware now queues the frame for transfer to a remote device (in the case

of broadcasts or floods, it queues the frame for transmission out local ports as

well). The firmware then obtains the chip index or indices from the forwarding

tag (or the broadcast restriction mask, in the case of broadcasts or floods),

locates the expansion port descriptor(s), and obtains the transfer queue tail

pointer from the expansion port descriptor(s). The firmware then enters the

frame into the appropriate transfer queue(s), in the manner already described in

a preceding section. Note that entry into multiple queues - i.e., a broadcast -

entails the allocation of additional data descriptors and the generation of

multiple queue entries, all set up to point to the same linked-list of packet

buffers.

When the frame has been placed on all of the necessary transfer queues, the

firmware inspects the status of the DMA Controller counter increment channel .

If the channel is not busy, then the firmware will load the channel registers with

a bitmask that indicates the remote device(s) to which the frame is directed, and

enable the DMA Controller to increment the request counter(s) in the remote

device(s) across the PCI bus.

10. The DMA Controller on the source device performs a request counter increment

to the specified remote device(s) as instructed by the firmware in step 9. This

request counter increment causes, in turn, a request interrupt to be generated to

the Switch Processor(s) in the remote device(s), notifying the Switch Processor

of the presence of an outstanding frame transfer request. The Switch

Processor(s) will then begin executing the interrupt service routine firmware that

is intended to handle these frame transfer requests.

11. The first step in the handling of the request counter interrupt at the remote

device is to inspect the buffer limit (maintained in the MaxBuffers field of the

expansion port descriptor corresponding to the source device) to determine if

the source device has exhausted its buffer allocation. If sufficient buffers

remain, the firmware will then allocate a data descriptor from the free data

PM3350-SW Datasheet(PDF) 121 Page - PMC-Sierra, Inc

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