PM3350-SW datasheet(124/224 Pages) PMC

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ELAN 8X10

PM3350 ELAN 8 X10

DATA SHEET

PMC-970109

ISSUE 3

8 PORT ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY

122

usual manner (from the head of the queue, which may not necessarily

correspond to the frame just queued) if possible.

20. In the mean time, the acknowledge counter increment performed by the

destination device to the source device in step 16 will cause an acknowledge

counter interrupt to be performed to the Switch Processor in the source device.

The Switch Processor then begins executing the acknowledge counter service

routine. This routine will verify that the acknowledge counter update was valid

(by consulting the expansion port descriptor corresponding to the incremented

acknowledge counter), and then remove the entry at the head of the queue,

updating the expansion port descriptor accordingly. The reference count

maintained within the last packet buffer for the queue entry is decremented: if

the count goes to zero, the packet buffer chain and the data descriptor are both

freed to their respective free pools; otherwise, only the data descriptor is freed,

and the updated reference count is simply written back to the packet buffer.

Finally, if the packet buffer chain was freed, the MaxBuffers field in the original

source local port descriptor is incremented by the count of buffers freed, to

restore it to its original value prior to the reception of the frame.

21. The DMA Controller in the remote (destination) device has, during this time,

been enabled to transmit the frame. It performs the transmit in the usual

manner, traversing the linked-list of packet buffers and copying the data in them

into the MAC channel FIFO. This process continues until the entire frame has

been transmitted. (If a broadcast is being performed, the DMA Controller will

perform the transmit operation for multiple channels concurrently.)

22. When the transmit is completed for a given channel, the DMA Controller will

interrupt the Switch Processor in the destination device to signal that frame

transmit has been accomplished and the channel should be serviced.

23. The standard transmit interrupt service routine will be invoked in response to the

interrupt generated in step 22. The firmware reads the data descriptor from the

head of the transmit queue, obtains a pointer to the last packet buffer from the

LastPB field of the data descriptor, and reads and decrements the reference

count.

24. If the decremented reference count is non-zero, only the data descriptor is freed

to the free data descriptor pool, and the updated reference count is written back;

otherwise, both the data descriptor and the packet buffer chain are freed to their

respective pools.

The firmware now reads and updates the per-port and per-MAC transmit

statistics. The per-port statistics are stored in the local port descriptor; the per-

MAC statistics are only updated in the case of unicast frames, in which case the

firmware obtains a pointer to the required destination hash bucket from the

HashBkt field of the data descriptor.

PM3350-SW Datasheet(PDF) 124 Page - PMC-Sierra, Inc

PM3350-SW Datasheet(HTML) 124 Page - PMC-Sierra, Inc

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