PCA9641PW datasheet(21/55 Pages) NXP

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PCA9641

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Product data sheet

Rev. 2.1 — 27 October 2015

21 of 55

NXP Semiconductors

PCA9641

2-channel I2C-bus master arbiter

8.6 Register 5: Interrupt Mask register ([B2:B0] = 101b)

8.7 Registers 6 and 7: MB registers ([B2:B0] = 110b and 111b)

Table 13.

INT_MSK - Interrupt Mask register (pointer address 05h) bit description

POR = 7Fh.

Bit

Symbol

Access

Value

Description

Reserved.

BUS_HUNG_MSK

R/W

Enable output interrupt when BUS_HUNG

function is set.

Disable output interrupt when BUS_HUNG

function is set.

MBOX_FULL_MSK

R/W

Enable output interrupt when MBOX_FULL

function is set.

Disable output interrupt when MBOX_FULL

function is set.

MBOX_EMPTY_MSK

R/W

Enable output interrupt when MBOX_EMPTY

function is set.

Disable output interrupt when MBOX_EMPTY

function is set.

TEST_INT_MSK

R/W

Enable output interrupt when TEST_INT function

is set.

Disable output interrupt when TEST_INT

function is set.

LOCK_GRANT_MSK

R/W

Enable output interrupt when LOCK_GRANT

function is set.

Disable output interrupt when LOCK_GRANT

function is set.

BUS_LOST_MSK

R/W

Enable output interrupt when BUS_LOST

function is set.

Disable output interrupt when BUS_LOST

function is set.

INT_IN_MSK

R/W

Enable output interrupt when INT_IN function is

set.

Disable output interrupt when INT_IN function is

set.

Table 14.

SMB - Shared Mail Box registers (pointer addresses 06h, 07h) bit description

POR = 00h.

Address

Bit

Symbol

Access

Description

06h

7 to 0

MB_LO[7:0]

R/W

Low 8 bits of the mail box.

07h

7 to 0

MB_HI[7:0]

R/W

High 8 bits of the mail box.

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