C8051F360 datasheet(113/288 Pages) SILABS

113 / 288 page

Rev. 1.0

113

C8051F360/1/2/3/4/5/6/7/8/9

SFR Definition 10.4. EIP1: Extended Interrupt Priority 1

Bit 7:

PT3: Timer 3 Interrupt Priority Control.

This bit sets the priority of the Timer 3 interrupt.

0: Timer 3 interrupts set to low priority level.

1: Timer 3 interrupts set to high priority level.

Bit 6:

PCP1: Comparator1 (CP1) Interrupt Priority Control.

This bit sets the priority of the CP1 interrupt.

0: CP1 interrupt set to low priority level.

1: CP1 interrupt set to high priority level.

Bit 5:

PCP0: Comparator0 (CP0) Interrupt Priority Control.

This bit sets the priority of the CP0 interrupt.

0: CP0 interrupt set to low priority level.

1: CP0 interrupt set to high priority level.

Bit 4:

PPCA0: Programmable Counter Array (PCA0) Interrupt Priority Control.

This bit sets the priority of the PCA0 interrupt.

0: PCA0 interrupt set to low priority level.

1: PCA0 interrupt set to high priority level.

Bit 3:

PADC0: ADC0 Conversion Complete Interrupt Priority Control.

This bit sets the priority of the ADC0 Conversion Complete interrupt.

0: ADC0 Conversion Complete interrupt set to low priority level.

1: ADC0 Conversion Complete interrupt set to high priority level.

Bit 2:

PWADC0: ADC0 Window Comparison Interrupt Priority Control.

This bit sets the priority of the ADC0 Window Comparison interrupt.

0: ADC0 Window Comparison interrupt set to low priority level.

1: ADC0 Window Comparison interrupt set to high priority level.

Bit 1:

UNUSED. Read = 0b. Write = don’t care.

Bit 0:

PSMB0: SMBus (SMB0) Interrupt Priority Control.

This bit sets the priority of the SMB0 interrupt.

0: SMB0 interrupt set to low priority level.

1: SMB0 interrupt set to high priority level.

SFR Page:

SFR Address:

0xCE

R/W

Reset Value

PT3

PCP1

PCP0

PPCA0

PADC0

PWADC0

–

PSMB0

00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

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