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C8051F360 Datasheet(PDF) 116 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 116 Page - Silicon Laboratories |
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116 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 116 Rev. 1.0 SFR Definition 10.7. IT01CF: INT0/INT1 Configuration Bit 7: IN1PL: /INT1 Polarity 0: /INT1 input is active low. 1: /INT1 input is active high. Bits 6–4: IN1SL2-0: /INT1 Port Pin Selection Bits These bits select which Port pin is assigned to /INT1. Note that this pin assignment is inde- pendent of the Crossbar; /INT1 will monitor the assigned Port pin without disturbing the peripheral that has been assigned the Port pin via the Crossbar. The Crossbar will not assign the Port pin to a peripheral if it is configured to skip the selected pin (accomplished by setting to ‘1’ the corresponding bit in register P0SKIP). Bit 3: IN0PL: /INT0 Polarity 0: /INT0 interrupt is active low. 1: /INT0 interrupt is active high. Bits 2–0: INT0SL2-0: /INT0 Port Pin Selection Bits These bits select which Port pin is assigned to /INT0. Note that this pin assignment is inde- pendent of the Crossbar. /INT0 will monitor the assigned Port pin without disturbing the peripheral that has been assigned the Port pin via the Crossbar. The Crossbar will not assign the Port pin to a peripheral if it is configured to skip the selected pin (accomplished by setting to ‘1’ the corresponding bit in register P0SKIP). SFR Page: SFR Address: all pages 0xE4 R/W R/W R/W R/W R/W R/W R/W R/W Reset Value IN1PL IN1SL2 IN1SL1 IN1SL0 IN0PL IN0SL2 IN0SL1 IN0SL0 00000001 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Note: Refer to SFR Definition 21.1. “TCON: Timer Control” on page 252 for INT0/1 edge- or level-sensitive interrupt selection. IN1SL2-0 /INT1 Port Pin 000 P0.0 001 P0.1 010 P0.2 011 P0.3 100 P0.4 101 P0.5 110 P0.6 111 P0.7 IN0SL2-0 /INT0 Port Pin 000 P0.0 001 P0.1 010 P0.2 011 P0.3 100 P0.4 101 P0.5 110 P0.6 111 P0.7 |
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