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C8051F360 Datasheet(PDF) 191 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 191 Page - Silicon Laboratories |
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191 / 288 page ![]() Rev. 1.0 191 C8051F360/1/2/3/4/5/6/7/8/9 SFR Definition 17.4. P0MDIN: Port0 Input Mode Bits 7–0: Analog Input Configuration Bits for P0.7-P0.0 (respectively). Port pins configured as analog inputs have their weak pullup, digital driver, and digital receiver disabled. 0: Corresponding P0.n pin is configured as an analog input. 1: Corresponding P0.n pin is not configured as an analog input. SFR Page: SFR Address: F 0xF1 R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 11111111 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Definition 17.5. P0MDOUT: Port0 Output Mode Bits 7–0: Output Configuration Bits for P0.7-P0.0 (respectively): ignored if corresponding bit in regis- ter P0MDIN is logic ‘0’. 0: Corresponding P0.n Output is open-drain. 1: Corresponding P0.n Output is push-pull. Note: When SDA and SCL appear on any of the Port I/O, each are open-drain regardless of the value of P0MDOUT. SFR Page: SFR Address: F 0xA4 R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 |
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