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C8051F360 Datasheet(PDF) 192 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 192 Page - Silicon Laboratories |
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192 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 192 Rev. 1.0 SFR Definition 17.6. P0SKIP: Port0 Skip Bits 7–0: P0SKIP[7:0]: Port0 Crossbar Skip Enable Bits. These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana- log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil- lator circuit, CNVSTR input) should be skipped by the Crossbar. 0: Corresponding P0.n pin is not skipped by the Crossbar. 1: Corresponding P0.n pin is skipped by the Crossbar. SFR Page: SFR Address: F 0xD4 R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Definition 17.7. P0MAT: Port0 Match Bits 7–0: P0MAT[7:0]: Port0 Match Value. These bits control the value that unmasked P0 Port pins are compared against. A Port Match event is generated if (P0 & P0MASK) does not equal (P0MAT & P0MASK). SFR Page: SFR Address: 0 0xF3 R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 11111111 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Definition 17.8. P0MASK: Port0 Mask Bits 7–0: P0MASK[7:0]: Port0 Mask Value. These bits select which Port pins will be compared to the value stored in P0MAT. 0: Corresponding P0.n pin is ignored and cannot cause a Port Match event. 1: Corresponding P0.n pin is compared to the corresponding bit in P0MAT. SFR Page: SFR Address: 0 0xF4 R/W R/W R/W R/W R/W R/W R/W R/W Reset Value 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 |
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